Method for fabrication of a semiconductor element and structure thereof

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dc.contributor.assigneeRice Universityen_US
dc.contributor.publisherUnited States Patent and Trademark Officeen_US
dc.creatorOr-Bach, Zvien_US
dc.creatorTour, James M.en_US
dc.creatorSinitskiy, Alexanderen_US
dc.creatorYao, Junen_US
dc.creatorBeitler, Elviraen_US
dc.date.accessioned2015-05-04T19:05:57Z
dc.date.available2015-05-04T19:05:57Z
dc.date.filed2009-05-05en_US
dc.date.issued2011-07-05en_US
dc.description.abstractRe-programmable antifuses and structures utilizing re-programmable antifuses are presented. Such structures include a configurable interconnect circuit having at least one re-programmable antifuse, wherein the at least one re-programmable antifuse is configured to be programmed to conduct by applying a first voltage across it and is configured to be re-programmed not to conduct by applying second voltage across it, wherein the second voltage is higher than the first voltage. Other embodiments of antifuses include an initializing step prior to programming.en_US
dc.digitization.specificationsThis patent information was downloaded from the US Patent and Trademark website (http://www.uspto.gov/) as image-PDFs. The PDFs were OCRed for access purposes.en_US
dc.format.extent17 ppen_US
dc.identifier.citationOr-Bach, Zvi, Tour, James M., Sinitskiy, Alexander, Yao, Jun and Beitler, Elvira, "Method for fabrication of a semiconductor element and structure thereof." Patent US7973559B2. issued 2011-07-05. Retrieved from https://hdl.handle.net/1911/80060.
dc.identifier.patentIDUS7973559B2en_US
dc.identifier.urihttps://hdl.handle.net/1911/80060
dc.language.isoengen_US
dc.titleMethod for fabrication of a semiconductor element and structure thereofen_US
dc.typeUtility patenten_US
dc.type.dcmiTexten_US
dc.type.genrepatentsen_US
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