Method for fabrication of a semiconductor element and structure thereof

Simple item page
dc.contributor.assigneeRice Universityen_US
dc.contributor.publisherUnited States Patent and Trademark Officeen_US
dc.creatorOr-Bach, Zvien_US
dc.creatorTour, James M.en_US
dc.creatorYao, Junen_US
dc.creatorCronquist, Brianen_US
dc.date.accessioned2015-05-04T19:06:03Z
dc.date.available2015-05-04T19:06:03Z
dc.date.filed2010-05-18en_US
dc.date.issued2013-03-05en_US
dc.description.abstractRe-programmable antifuses and structures utilizing re-programmable antifuses are presented herein. Such structures include a configurable interconnect circuit having at least one re-programmable antifuse, wherein the at least one re-programmable antifuse is configured to be programmed to conduct by applying a first voltage across it and is configured to be re-programmed not to conduct by applying second voltage across it, wherein the second voltage is higher than the first voltage. Additionally, the re-programmable antifuses may be configured to a permanently conductive state by applying an even higher voltage across it.en_US
dc.digitization.specificationsThis patent information was downloaded from the US Patent and Trademark website (http://www.uspto.gov/) as image-PDFs. The PDFs were OCRed for access purposes.en_US
dc.format.extent19 ppen_US
dc.identifier.citationOr-Bach, Zvi, Tour, James M., Yao, Jun and Cronquist, Brian, "Method for fabrication of a semiconductor element and structure thereof." Patent US8390326B2. issued 2013-03-05. Retrieved from https://hdl.handle.net/1911/80117.
dc.identifier.patentIDUS8390326B2en_US
dc.identifier.urihttps://hdl.handle.net/1911/80117
dc.language.isoengen_US
dc.titleMethod for fabrication of a semiconductor element and structure thereofen_US
dc.typeUtility patenten_US
dc.type.dcmiTexten_US
dc.type.genrepatentsen_US
Files
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
US8390326B2.pdf
Size:
1.5 MB
Format:
Adobe Portable Document Format
Download
Collections
Rice Patents