Method for fabrication of a semiconductor element and structure thereof

Date
2013-03-05
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Abstract

Re-programmable antifuses and structures utilizing re-programmable antifuses are presented herein. Such structures include a configurable interconnect circuit having at least one re-programmable antifuse, wherein the at least one re-programmable antifuse is configured to be programmed to conduct by applying a first voltage across it and is configured to be re-programmed not to conduct by applying second voltage across it, wherein the second voltage is higher than the first voltage. Additionally, the re-programmable antifuses may be configured to a permanently conductive state by applying an even higher voltage across it.

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Utility patent
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Or-Bach, Zvi, Tour, James M., Yao, Jun and Cronquist, Brian, "Method for fabrication of a semiconductor element and structure thereof." Patent US8390326B2. issued 2013-03-05. Retrieved from https://hdl.handle.net/1911/80117.

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