Interlaced, Nanostructured Interface with Graphene Buffer Layer Reduces Thermal Boundary Resistance in Nano/Microelectronic Systems

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dc.citation.firstpage989
dc.citation.issueNumber1
dc.citation.journalTitleACS Applied Materials & Interfaces
dc.citation.lastpage998
dc.citation.volumeNumber9
dc.contributor.authorTao, Lei
dc.contributor.authorSreenivasan, Sreeprasad
dc.contributor.authorShahsavari, Rouzbeh
dc.contributor.orgSmalley Institute for Nanoscale Science and Technology
dc.date.accessioned2017-01-27T19:05:16Z
dc.date.available2017-01-27T19:05:16Z
dc.date.issued2017
dc.description.abstractImproving heat transfer in hybrid nano/microelectronic systems is a challenge, mainly due to the high thermal boundary resistance (TBR) across the interface. Herein, we focus on gallium nitride (GaN)/diamond interface—as a model system with various high power, high temperature, and optoelectronic applications—and perform extensive reverse nonequilibrium molecular dynamics simulations, decoding the interplay between the pillar length, size, shape, hierarchy, density, arrangement, system size, and the interfacial heat transfer mechanisms to substantially reduce TBR in GaN-on-diamond devices. We found that changing the conventional planar interface to nanoengineered, interlaced architecture with optimal geometry results in >80% reduction in TBR. Moreover, introduction of conformal graphene buffer layer further reduces the TBR by ∼33%. Our findings demonstrate that the enhanced generation of intermediate frequency phonons activates the dominant group velocities, resulting in reduced TBR. This work has important implications on experimental studies, opening up a new space for engineering hybrid nano/microelectronics.
dc.identifier.citationTao, Lei, Sreenivasan, Sreeprasad and Shahsavari, Rouzbeh. "Interlaced, Nanostructured Interface with Graphene Buffer Layer Reduces Thermal Boundary Resistance in Nano/Microelectronic Systems." <i>ACS Applied Materials & Interfaces,</i> 9, no. 1 (2017) American Chemical Society: 989-998. http://dx.doi.org/10.1021/acsami.6b09482.
dc.identifier.doihttp://dx.doi.org/10.1021/acsami.6b09482
dc.identifier.urihttps://hdl.handle.net/1911/93783
dc.language.isoeng
dc.publisherAmerican Chemical Society
dc.rightsThis is an author's peer-reviewed final manuscript, as accepted by the publisher. The published article is copyrighted by the American Chemical Society.
dc.subject.keywordGaN−diamond interface
dc.subject.keywordheat management
dc.subject.keywordrNEMD
dc.subject.keywordTBR
dc.titleInterlaced, Nanostructured Interface with Graphene Buffer Layer Reduces Thermal Boundary Resistance in Nano/Microelectronic Systems
dc.typeJournal article
dc.type.dcmiText
dc.type.publicationpost-print
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