FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink

dc.citation.bibtexNameinproceedingsen_US
dc.citation.conferenceNameIEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP)en_US
dc.contributor.authorGuo, Yuanbinen_US
dc.contributor.authorMcCain, Dennisen_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:46:13Zen_US
dc.date.available2007-10-31T00:46:13Zen_US
dc.date.issued2005-03-01en_US
dc.date.modified2005-06-24en_US
dc.date.note2005-02-01en_US
dc.date.submitted2005-03-01en_US
dc.descriptionConference Paperen_US
dc.description.abstractIn this paper, we present a novel FFT-accelerated iterative Linear MMSE chip equalizer in the MIMO CDMA downlink receiver. The reversed form time-domain matrix multiplication in the Conjugate Gradient iteration is accelerated by an equivalent frequency-domain circular convolution with FFT-based "overlap-save" architecture. The iteration rapidly refines a crude initial approximation to the actual final equalizer taps. This avoids the Direct-Matrix-Inverse with O((<i>NL</i>)&sup3;) complexity, and reduces the standard CG complexity from O((<i>NL</i>)&sup2;) to O(<i>NL</i>log<sub>2</sub>(<i>NL</i>)). Simulation demonstrates strong numerical stability and promising performance/complexity tradeoff, especially for very long channels.en_US
dc.description.sponsorshipNokiaen_US
dc.identifier.citationY. Guo, D. McCain and J. R. Cavallaro, "FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink," 2005.en_US
dc.identifier.doihttp://dx.doi.org/10.1109/ICASSP.2005.1415882en_US
dc.identifier.urihttps://hdl.handle.net/1911/19935en_US
dc.language.isoengen_US
dc.subjectMIMOen_US
dc.subjectchip equalizeren_US
dc.subjectCDMAen_US
dc.subjectiterativeen_US
dc.subject.keywordMIMOen_US
dc.subject.keywordchip equalizeren_US
dc.subject.keywordCDMAen_US
dc.subject.keyworditerativeen_US
dc.titleFFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlinken_US
dc.typeConference paperen_US
dc.type.dcmiTexten_US
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