FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink
dc.citation.bibtexName | inproceedings | en_US |
dc.citation.conferenceName | IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP) | en_US |
dc.contributor.author | Guo, Yuanbin | en_US |
dc.contributor.author | McCain, Dennis | en_US |
dc.contributor.author | Cavallaro, Joseph R. | en_US |
dc.contributor.org | Center for Multimedia Communications (http://cmc.rice.edu/) | en_US |
dc.date.accessioned | 2007-10-31T00:46:13Z | en_US |
dc.date.available | 2007-10-31T00:46:13Z | en_US |
dc.date.issued | 2005-03-01 | en_US |
dc.date.modified | 2005-06-24 | en_US |
dc.date.note | 2005-02-01 | en_US |
dc.date.submitted | 2005-03-01 | en_US |
dc.description | Conference Paper | en_US |
dc.description.abstract | In this paper, we present a novel FFT-accelerated iterative Linear MMSE chip equalizer in the MIMO CDMA downlink receiver. The reversed form time-domain matrix multiplication in the Conjugate Gradient iteration is accelerated by an equivalent frequency-domain circular convolution with FFT-based "overlap-save" architecture. The iteration rapidly refines a crude initial approximation to the actual final equalizer taps. This avoids the Direct-Matrix-Inverse with O((<i>NL</i>)³) complexity, and reduces the standard CG complexity from O((<i>NL</i>)²) to O(<i>NL</i>log<sub>2</sub>(<i>NL</i>)). Simulation demonstrates strong numerical stability and promising performance/complexity tradeoff, especially for very long channels. | en_US |
dc.description.sponsorship | Nokia | en_US |
dc.identifier.citation | Y. Guo, D. McCain and J. R. Cavallaro, "FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink," 2005. | en_US |
dc.identifier.doi | http://dx.doi.org/10.1109/ICASSP.2005.1415882 | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/19935 | en_US |
dc.language.iso | eng | en_US |
dc.subject | MIMO | en_US |
dc.subject | chip equalizer | en_US |
dc.subject | CDMA | en_US |
dc.subject | iterative | en_US |
dc.subject.keyword | MIMO | en_US |
dc.subject.keyword | chip equalizer | en_US |
dc.subject.keyword | CDMA | en_US |
dc.subject.keyword | iterative | en_US |
dc.title | FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink | en_US |
dc.type | Conference paper | en_US |
dc.type.dcmi | Text | en_US |
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