Simulation of Systolic Arrays On The Connection Machine

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dc.citation.bibtexNameconferencepaperen_US
dc.citation.firstpage151
dc.citation.journalTitleSociety for Computer Simulation (SCS)en_US
dc.citation.lastpage160
dc.contributor.authorHemkumar, Nariankadu D.en_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:46:42Z
dc.date.available2007-10-31T00:46:42Z
dc.date.issued1993-09-20
dc.date.modified2003-07-13en_US
dc.date.submitted2001-08-22en_US
dc.description.abstractThe use of a programming model which extends naturally from the underlying hardware, greatly eases the design and implementation of simulators, especially for those systems that resemble the hardware in the paradigm of computation. Given the characteristics of systolic arrays, SIMS computers which employ the data parallel programming model provide an ideal environment. In this paper, we present a systolic array simulator, a simulation tool written for the Connection Machine (model CM2), a SIMD machine with powerful interproccessor communication capabilities. Especially as recent advances have automated the design, there is a need for a verification environment to prototype systolic arrays. Primarily a simulation tool, the systolic array simulator also helps identify inefficiencies and motivates optimal design proir to implementation in either custom VLSI or DSP systems. Currently, we are updating the tool to allow the simulation of dynamic array reconfiguration algorithms under transient and permanent fault conditions. The simulator is also being ported the CM5.en_US
dc.identifier.citationN. D. Hemkumar and J. R. Cavallaro, "Simulation of Systolic Arrays On The Connection Machine," <i>Society for Computer Simulation (SCS),</i> 1993.
dc.identifier.doihttp://dx.doi.org/10.1177/003754979306100302en_US
dc.identifier.urihttps://hdl.handle.net/1911/19947
dc.language.isoeng
dc.subjectsystolic arrays*
dc.subjectalgorithm verification*
dc.subjectdesign optimizaiton*
dc.subjectconnection machine*
dc.subject.keywordsystolic arraysen_US
dc.subject.keywordalgorithm verificationen_US
dc.subject.keyworddesign optimizaitonen_US
dc.subject.keywordconnection machineen_US
dc.titleSimulation of Systolic Arrays On The Connection Machineen_US
dc.typeConference paper
dc.type.dcmiText
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