Non-intrusive Persistence with a Backend NVM Controller

dc.citation.issueNumber99en_US
dc.citation.journalTitleComputer Architecture Lettersen_US
dc.citation.volumeNumberPPen_US
dc.contributor.authorPu, Libeien_US
dc.contributor.authorDoshi, Kshitijen_US
dc.contributor.authorGiles, Ellisen_US
dc.contributor.authorVarman, Peteren_US
dc.date.accessioned2015-10-01T15:40:10Z
dc.date.available2015-10-01T15:40:10Z
dc.date.issued2015en_US
dc.description.abstractBy providing instruction-grained access to vast amounts of persistent data with ordinary loads and stores, byte-addressable storage class memory (SCM) has the potential to revolutionize system architecture. We describe a non-intrusive SCM controller for achieving light-weight failure atomicity through back-end operations. Our solution avoids costly software intervention by decoupling isolation and concurrency-driven atomicity from failure atomicity and durability, and does not require changes to the front-end cache hierarchy. Two implementation alternatives – one using a hardware structure, and the other extending the memory controller with a firmware managed volatile space, are described.en_US
dc.identifier.citationPu, Libei, Doshi, Kshitij, Giles, Ellis, et al.. "Non-intrusive Persistence with a Backend NVM Controller." <i>Computer Architecture Letters,</i> PP, no. 99 (2015) IEEE: http://dx.doi.org/10.1109/LCA.2015.2443105.
dc.identifier.doihttp://dx.doi.org/10.1109/LCA.2015.2443105en_US
dc.identifier.urihttps://hdl.handle.net/1911/81854
dc.language.isoengen_US
dc.publisherIEEE
dc.rightsThis is an author's peer-reviewed final manuscript, as accepted by the publisher. The published article is copyrighted by IEEE.en_US
dc.subject.keywordnon-volatile memoryen_US
dc.subject.keywordpersistent memoryen_US
dc.subject.keywordatomicityen_US
dc.subject.keyworddurabilityen_US
dc.subject.keywordconsistencyen_US
dc.titleNon-intrusive Persistence with a Backend NVM Controlleren_US
dc.typeJournal articleen_US
dc.type.dcmiTexten_US
dc.type.publicationpost-printen_US
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