A Systolic VLSI Architecture for Complex SVD
| dc.citation.bibtexName | inproceedings | en_US |
| dc.citation.conferenceName | IEEE International Symposium on Circuits and Systems (ISCAS) | en_US |
| dc.citation.firstpage | 1061 | |
| dc.citation.lastpage | 1064 | |
| dc.citation.location | San Diego, CA | en_US |
| dc.contributor.author | Hemkumar, Nariankadu D. | en_US |
| dc.contributor.author | Cavallaro, Joseph R. | en_US |
| dc.contributor.org | Center for Multimedia Communications (http://cmc.rice.edu/) | en_US |
| dc.date.accessioned | 2007-10-31T00:46:36Z | |
| dc.date.available | 2007-10-31T00:46:36Z | |
| dc.date.issued | 1992-05-20 | |
| dc.date.modified | 2001-08-28 | en_US |
| dc.date.note | 2001-08-28 | en_US |
| dc.date.submitted | 1992-05-20 | en_US |
| dc.description | Conference Paper | en_US |
| dc.description.abstract | A systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering" is presented. A novel two-step, two-sided unitary transformation scheme, tailored to the use of CORDIC algorithms for high speed arithmetic, is employed to diagonalize a complex 2x2 matrix. Architecturally, the complex SVD array is modeled on the Brent-Luk-VanLoan array for real SVD. An expandable array of O(n²) complex 2x2 matrix processors computes the SVD of an nxn matrix in O(n log n) time. A CORDIC architecture for the complex 2x2 processor with an area complexity twice that of a real 2x2 processor is proposed. Computation time for the complex SVD array is less than three times that for a real SVD array with a similar CORDIC based implementation. | en_US |
| dc.identifier.citation | N. D. Hemkumar and J. R. Cavallaro, "A Systolic VLSI Architecture for Complex SVD," 1992. | |
| dc.identifier.uri | https://hdl.handle.net/1911/19945 | |
| dc.language.iso | eng | |
| dc.subject | cyclic Jacobi method | * |
| dc.subject | complex SVD | * |
| dc.subject | VLSI | * |
| dc.subject | Brent-Luk-VanLoan | * |
| dc.subject.keyword | cyclic Jacobi method | en_US |
| dc.subject.keyword | complex SVD | en_US |
| dc.subject.keyword | VLSI | en_US |
| dc.subject.keyword | Brent-Luk-VanLoan | en_US |
| dc.title | A Systolic VLSI Architecture for Complex SVD | en_US |
| dc.type | Conference paper | |
| dc.type.dcmi | Text |
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