A Systolic VLSI Architecture for Complex SVD

Date
1992-05-20
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract

A systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering" is presented. A novel two-step, two-sided unitary transformation scheme, tailored to the use of CORDIC algorithms for high speed arithmetic, is employed to diagonalize a complex 2x2 matrix. Architecturally, the complex SVD array is modeled on the Brent-Luk-VanLoan array for real SVD. An expandable array of O(n²) complex 2x2 matrix processors computes the SVD of an nxn matrix in O(n log n) time. A CORDIC architecture for the complex 2x2 processor with an area complexity twice that of a real 2x2 processor is proposed. Computation time for the complex SVD array is less than three times that for a real SVD array with a similar CORDIC based implementation.

Description
Conference Paper
Advisor
Degree
Type
Conference paper
Keywords
cyclic Jacobi method, complex SVD, VLSI, Brent-Luk-VanLoan
Citation

N. D. Hemkumar and J. R. Cavallaro, "A Systolic VLSI Architecture for Complex SVD," 1992.

Has part(s)
Forms part of
Published Version
Rights
Link to license
Citable link to this page
Collections