Nanoporous metal-oxide memory

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dc.contributor.assigneeRice Universityen_US
dc.contributor.publisherUnited States Patent and Trademark Officeen_US
dc.creatorTour, James M.en_US
dc.creatorWang, Gunuken_US
dc.creatorYang, Yangen_US
dc.date.accessioned2017-12-14T19:30:24Zen_US
dc.date.available2017-12-14T19:30:24Zen_US
dc.date.filed2015-07-27en_US
dc.date.issued2017-11-28en_US
dc.description.abstractA nanoporous (NP) memory may include a non-porous layer and a nanoporous layer sandwiched between the bottom and top electrodes. The memory may be free of diodes, selectors, and/or transistors that may be necessary in other memories to mitigate crosstalk. The nanoporous material of the nanoporous layer may be a metal oxide, metal chalcogenide, or a combination thereof. Further, the memory may lack any additional components. Further, the memory may be free from requiring an electroformation process to allow switching between ON/OFF states.en_US
dc.digitization.specificationsThis patent information was downloaded from the US Patent and Trademark website (http://www.uspto.gov/) as image-PDFs. The PDFs were OCRed for access purposesen_US
dc.format.extent17en_US
dc.identifier.citationTour, James M., Wang, Gunuk and Yang, Yang, "Nanoporous metal-oxide memory." Patent US9831424B2. issued 2017-11-28. Retrieved from <a href="https://hdl.handle.net/1911/98883">https://hdl.handle.net/1911/98883</a>.en_US
dc.identifier.patentIDUS9831424B2en_US
dc.identifier.urihttps://hdl.handle.net/1911/98883en_US
dc.language.isoengen_US
dc.titleNanoporous metal-oxide memoryen_US
dc.typeUtility patenten_US
dc.type.dcmiTexten_US
dc.type.genrepatentsen_US
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