Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration
dc.citation.conferenceDate | 2009 | en_US |
dc.citation.conferenceName | 43rd Asilomar Conference on Signals, Systems and Computers | en_US |
dc.citation.firstpage | 221 | en_US |
dc.citation.lastpage | 225 | en_US |
dc.citation.location | Pacific Grove, CA | en_US |
dc.contributor.author | Brogioli, Michael C. | en_US |
dc.contributor.author | Cavallaro, Joseph R. | en_US |
dc.contributor.org | Center for Multimedia Communication | en_US |
dc.date.accessioned | 2012-06-12T18:49:17Z | en_US |
dc.date.available | 2012-06-12T18:49:17Z | en_US |
dc.date.issued | 2009-11-01 | en_US |
dc.description.abstract | Wireless communications and video kernels contain vast instruction and data level parallelism that can far outstrip programmable high performance DSPs. Hardware acceleration of these bottlenecks is commonly done at the cost of software flexibility. Many vendors, however, view software as intellectual property and prefer a software solution that is a proprietary implementation. The paper uses a research compiler for architectural design space exploration to present comparisons between compiler generated scalable software programmable DSP architectures versus hardware acceleration implementations. It shows that scaled up compiler generated software programmable DSP architectures can be attractive alternatives to non-programmable hardware acceleration. | en_US |
dc.description.sponsorship | Nokia | en_US |
dc.description.sponsorship | Nokia Siemens Networks (NSN) | en_US |
dc.description.sponsorship | Texas Instruments | en_US |
dc.description.sponsorship | Xilinx | en_US |
dc.description.sponsorship | National Science Foundation | en_US |
dc.identifier.citation | M. C. Brogioli and J. R. Cavallaro, "Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration," 2009. | en_US |
dc.identifier.doi | http://dx.doi.org/10.1109/ACSSC.2009.5470122 | en_US |
dc.identifier.other | http://scholar.google.com/scholar?cluster=11782154064670120098&hl=en&as_sdt=0,44 | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/64241 | en_US |
dc.language.iso | eng | en_US |
dc.publisher | IEEE | en_US |
dc.subject | Wireless | en_US |
dc.subject | Video kernels | en_US |
dc.subject | DSP | en_US |
dc.title | Compiler Driven Architecture Design Space Exploration for DSP Workloads: A Study in Software Programmability Versus Hardware Acceleration | en_US |
dc.type | Conference paper | en_US |
dc.type.dcmi | Text | en_US |
dc.type.dcmi | Text | en_US |