Real-Time Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers
| dc.citation.bibtexName | article | en_US |
| dc.citation.firstpage | 468 | |
| dc.citation.issueNumber | 3 | en_US |
| dc.citation.journalTitle | IEEE Transactions on Wireless Communications | en_US |
| dc.citation.lastpage | 489 | |
| dc.citation.volumeNumber | 1 | en_US |
| dc.contributor.author | Rajagopal, Sridhar | en_US |
| dc.contributor.author | Bhashyam, Srikrishna | en_US |
| dc.contributor.author | Cavallaro, Joseph R. | en_US |
| dc.contributor.author | Aazhang, Behnaam | en_US |
| dc.contributor.org | Center for Multimedia Communications (http://cmc.rice.edu/) | en_US |
| dc.date.accessioned | 2007-10-31T00:58:44Z | |
| dc.date.available | 2007-10-31T00:58:44Z | |
| dc.date.issued | 2002-07-20 | en |
| dc.date.modified | 2003-11-09 | en_US |
| dc.date.submitted | 2001-09-18 | en_US |
| dc.description | Journal Paper | en_US |
| dc.description.abstract | This paper presents alogrithms and architecture designs that can meet real-time requirements of multiuser channel estimation and detection in future wireless base-station receivers. Sophisticated algorithms proposed to implement multiuser channel estimation and detection make their real-time implementation difficult on current Digital Signal Processor (DSP)-based receivers. A maximum-likelihood based multiuser channel estimation scheme requiring matrix inversions is redesigned from an implementation perspective for a reduce complexity, iterative scheme with a simple fixed-point VLSI architecture. A reduced-complexity, bit-streaming multiuser detection algorithm that avoids the need for multishot detection is also developed for a simple, pipelined VLSI architecutre. Thus, we show that real-time solutions can be achieved for third generation wireless systems by (1) designing the alogrithms from a fixed-point implementation perspective, without significant loss in error rate performance, (2) task partitioning and (3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, parallelism and bit-level computations to achieve real-time with minumum area overhead. | en_US |
| dc.description.sponsorship | Texas Advanced Technology Program | en_US |
| dc.description.sponsorship | Nokia | en_US |
| dc.description.sponsorship | National Science Foundation | en_US |
| dc.identifier.citation | S. Rajagopal, S. Bhashyam, J. R. Cavallaro and B. Aazhang, "Real-Time Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers," <i>IEEE Transactions on Wireless Communications,</i> vol. 1, no. 3, 2002. | |
| dc.identifier.doi | http://dx.doi.org/10.1109/TWC.2002.800545 | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/20216 | |
| dc.language.iso | eng | |
| dc.publisher | IEEE | en_US |
| dc.subject | Real-time implementation | * |
| dc.subject | multiuser channel estimation | * |
| dc.subject | multiuser detection | * |
| dc.subject | DSP | * |
| dc.subject | VLSI | * |
| dc.subject | W-CDMA | * |
| dc.subject.keyword | Real-time implementation | en_US |
| dc.subject.keyword | multiuser channel estimation | en_US |
| dc.subject.keyword | multiuser detection | en_US |
| dc.subject.keyword | DSP | en_US |
| dc.subject.keyword | VLSI | en_US |
| dc.subject.keyword | W-CDMA | en_US |
| dc.title | Real-Time Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers | en_US |
| dc.type | Journal article | |
| dc.type.dcmi | Text |