Real-Time Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers

Abstract

This paper presents alogrithms and architecture designs that can meet real-time requirements of multiuser channel estimation and detection in future wireless base-station receivers. Sophisticated algorithms proposed to implement multiuser channel estimation and detection make their real-time implementation difficult on current Digital Signal Processor (DSP)-based receivers. A maximum-likelihood based multiuser channel estimation scheme requiring matrix inversions is redesigned from an implementation perspective for a reduce complexity, iterative scheme with a simple fixed-point VLSI architecture. A reduced-complexity, bit-streaming multiuser detection algorithm that avoids the need for multishot detection is also developed for a simple, pipelined VLSI architecutre. Thus, we show that real-time solutions can be achieved for third generation wireless systems by (1) designing the alogrithms from a fixed-point implementation perspective, without significant loss in error rate performance, (2) task partitioning and (3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, parallelism and bit-level computations to achieve real-time with minumum area overhead.

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Journal article
Keywords
Real-time implementation, multiuser channel estimation, multiuser detection, DSP, VLSI, W-CDMA
Citation

S. Rajagopal, S. Bhashyam, J. R. Cavallaro and B. Aazhang, "Real-Time Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers," IEEE Transactions on Wireless Communications, vol. 1, no. 3, 2002.

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