As feature sizes in VLSI circuits extend into the far sub-micron range, new process techniques, such as using phase shifting masks for photolithography, will be needed. Under these conditions, the only means for the circuit designer to design compact and efficient circuits with good yield capabilities is to be able to see t he effect of different design approaches on manufactured silicon, instead of solely relying on conservative general design rules. The Integrated CAD Framework accomplishes this by providing a link between a layout editor (Magic), advanced photolithographic techniques such as phase shifted masks, and a process simulator (Depict). This paper discusses some applications of this tool. A non-conventional process technique involving interferometric phase shifting and off-axis illumination has been evaluated using the tool. Also, a feature of the CAD Framework which allows representation of a phase shifted mask, together with its layout analysis capability has been used to compact a piece of layout by inserting phase shifted elements into it.