Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations
dc.citation.conferenceDate | 1996 | en_US |
dc.citation.conferenceName | NSF Design and Manufacturing Grantees Conference | en_US |
dc.citation.firstpage | 345 | |
dc.citation.lastpage | 346 | |
dc.citation.location | Albuquerque, NM | en_US |
dc.contributor.author | Cavallaro, Joseph R. | |
dc.contributor.author | Sengupta, Chaitali | |
dc.contributor.author | Tittel, Frank K. | |
dc.contributor.author | Wilson, William L. Jr. | |
dc.contributor.org | Center for Multimedia Communication | en_US |
dc.date.accessioned | 2012-06-21T21:52:55Z | |
dc.date.available | 2012-06-21T21:52:55Z | |
dc.date.issued | 1996-01-01 | eng |
dc.description.abstract | This paper describes a CAD tool (An Integrated CAD Framework) which links VLSI layout editors to lithographic simulators and provides information on the simulated resolution of a feature to the circuit designer. The designer can modify the original layout based upon this analysis to create compact circuits with better yield capabilities. The objective of this project is to improve the manufacturability of high density VLSI integrated circuits. | en_US |
dc.description.sponsorship | National Science Foundation | en_US |
dc.description.sponsorship | Texas Instruments | en_US |
dc.description.sponsorship | Technology Modeling Associates | en_US |
dc.identifier.citation | J. R. Cavallaro, C. Sengupta, F. K. Tittel and W. L. J. Wilson, "Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations," 1996. | * |
dc.identifier.doi | http://dx.doi.org/10.1109/66.641490 | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/64292 | |
dc.language.iso | eng | en |
dc.publisher | SME Press | en_US |
dc.subject | CAD framework | en_US |
dc.subject | Circuit design | en_US |
dc.subject | VLSI layout editors | en_US |
dc.subject | Integrated circuits | en_US |
dc.title | Automated Evaluation of Critical Features in VLSI Layouts Based on Photolithographic Simulations | en_US |
dc.type | Conference paper | en_US |
dc.type.dcmi | Text | en |
dc.type.dcmi | Text | en_US |