Digital computer register allocation and code spilling using interference graph coloring
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A method is disclosed for allocating internal machine registers in a digital computer for use in storing values defined and referenced by a computer program. An allocator in accordance with the present invention constructs a interference graph having a node therein for the live range of each value defined by a computer program, and having an edge between every two nodes whose associated live ranges interfere with each other. The allocator models the register allocation process as a graph-coloring problem, such that for a computer having R registers, the allocator of the present invention iteratively attempts to R-color the interference graph. The interference graph is colored to the extent possible on each iteration before a determination is made that one or more live ranges must be spilled. After spill code has been added to the program to transform spilled live ranges into multiple smaller live ranges, the allocator constructs a new interference graph and the process is repeated.
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Briggs, Preston P., Cooper, Keith D., Kennedy, Kenneth W. Jr. and Torczon, Linda M., "Digital computer register allocation and code spilling using interference graph coloring." Patent US5249295A. issued 1993-09-28. Retrieved from https://hdl.handle.net/1911/79821.