Rice Wireless

Permanent URI for this collection

https://hdl.handle.net/1911/21945
Formerly the Center for Multimedia Communications, Rice Wireless is part of the university's Electrical and Computer Engineering Department. More information about the group can be found at http://wireless.rice.edu/.

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Browsing Rice Wireless by Subject "adaptive"

Now showing 1 - 2 of 2
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    A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems
    (2005-05-01) Guo, Yuanbin; Cavallaro, Joseph R.; Center for Multimedia Communications (http://cmc.rice.edu/)
    In this paper, we propose a reduced complexity and power efficient System-on-Chip (SoC) architecture for adaptive interference suppression in CDMA systems. The adaptive Parallel-Residue-Compensation architecture leads to significant performance gain over the conventional interference cancellation algorithms. The multi-code commonality is explored to avoid the direct Interference Cancellation (IC), which reduces the IC complexity from O(K^2N) to O(KN). The physical meaning of the complete versus weighted IC is applied to clip the weights above a certain threshold so as to reduce the VLSI circuit activity rate. Novel scalable SoC architectures based on simple combinational logic are proposed to eliminate dedicated multipliers with at least 10X saving in hardware resource. A Catapult C High Level Synthesis methodology is apply to explore the VLSI design space extensively and achieve at least 4£ speedup. Multi-stage Convergence-Masking-Vector combined with clock gating is proposed to reduce the VLSI dynamic power consumption by up to 90%.
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    Low Power VLSI Architecture for Adaptive MAI Suppression in CDMA Using Multi-stage Convergence Masking Vector
    (2005-09-01) Guo, Yuanbin; McCain, Dennis; Cavallaro, Joseph R.; Center for Multimedia Communications (http://cmc.rice.edu/)
    In this paper, we propose a novel low power and low complexity multi-stage Parallel-Residue-Compensation (PRC) architecture for enhanced MAI suppression in the CDMA systems. The accuracy of the interference cancellation is improved with a set of weights computed from an adaptive Normalized Least-Mean-Square (NLMS) algorithm. The physical meaning of the complete versus weighted interference cancellation is applied to clip the weights above a certain threshold. Multistage Convergence-Masking-Vector (CMV) is then proposed to combine with the clock gating as a dynamic power management scheme in the VLSI receiver architecture. This reduces the dynamic power consumption in the VLSI architecture by up to 90% with a negligible performance loss.