Browsing by Author "Gadhiok, Manik"

Now showing 1 - 5 of 5
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    Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems
    (IEEE, 2006-04-01) Brogioli, Michael C.; Gadhiok, Manik; Cavallaro, Joseph R.; Center for Multimedia Communication
    This paper shows how iterative hardware/software partitioning in heterogeneous DSP/FPGA based embedded systems can be utilized to achieve real-time deadlines of modern 3GPP wireless equalization workloads. By utilizing a well defined set of application partitioning criteria in tandem with SOC simulation tools, we are able to show a greater than six fold improvement in application performance and ultimately meet, and even exceed real-time data processing deadlines.
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    An FPGA-based Daughtercard for TIs C6000 family of DSKs
    (2005-06-01) Gadhiok, Manik; Hardy, Ricky; Murphy, Patrick; Frantz, Patrick; Choi, Hyeokho; Cavallaro, Joseph R.; Digital Signal Processing (http://dsp.rice.edu/)
    In this paper we present an FPGA-based daughtercard designed for TIs C6000 family of DSP Starter Kits (DSKs). The hardware, initially designed for a course project, provides a platform for studying heterogeneous systems and hardware software co-design. Students will leverage the DSK-FPGA system for rapid prototyping of signal processing algorithms and to study task-partitioning and system integration. These techniques are becoming increasingly important for system designers as we move to system-on-chip (SOC) devices. The daughtercard hardware is fully functional, and a software package is being developed to provide a seamless communication interface between the DSK and FPGA.
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    Preamble-based Symbol Timing Estimation for Wireless OFDM Systems
    (IEEE, 2007) Gadhiok, Manik; Cavallaro, Joseph R.; CMC
    We propose a timing estimation scheme that reduces computational complexity while achieving performance comparable to the autocorrelation method commonly employed at the wireless receiver. The proposed method is based on the average magnitude difference function (AMDF). We present performance results for the proposed method for AWGN and Raleighfading channels in the context of IEEE 802.11a short preamble sequence. We also propose a preamble sequence based on Golomb sequence and compare its timing estimation performance with the IEEE 802.11a short-sequence. Simulation results show significant performance improvements for AWGN as well as Raleighfading channels.
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    Preamble-based Symbol Timing Estimation for Wireless OFDM Systems
    (IEEE, 2007-11-01) Gadhiok, Manik; Cavallaro, Joseph R.; Center for Multimedia Communication
    We propose a timing estimation scheme that reduces computational complexity while achieving performance comparable to the autocorrelation method commonly employed at the wireless receiver. The proposed method is based on the average magnitude difference function (AMDF). We present performance results for the proposed method for AWGN and Raleighfading channels in the context of IEEE 802.11a short preamble sequence. We also propose a preamble sequence based on Golomb sequence and compare its timing estimation performance with the IEEE 802.11a short-sequence. Simulation results show significant performance improvements for AWGN as well as Raleighfading channels.
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    Symbol timing synchronization for OFDM-based WLAN systems
    (2008) Gadhiok, Manik; Cavallaro, Joseph R.
    In this work, we address the problem of symbol timing synchronization for Orthogonal Frequency Division Multiplexing (OFDM) WLAN systems. OFDM systems are known to be sensitive to synchronization errors and improving the accuracy of timing offset estimation can help improve the overall system performance. We propose a method that reduces computational complexity while achieving performance comparable to the autocorrelation method commonly employed at the wireless receiver. The proposed method is based on the average magnitude difference function (AMDF). We present performance results for the proposed method for AWGN and Raleigh-fading channels in the context of IEEE 802.11a short preamble sequence. We also propose a preamble sequence based on Golomb sequence, a sequence with low auto-correlation properties, and compare its timing estimation performance with that of the IEEE 802.11a short-sequence. Simulation results show significant performance improvements for AWGN as well as Raleigh-fading channels. We also present an experimental Field-Programmable Gate Array (FPGA) implementation of the symbol timing estimation block using a Intermediate-frequency based hardware transceiver and LabVIEW using fixed-point arithmetic.