Browsing by Author "Cavallaro, Joseph R"

Now showing 1 - 8 of 8
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    Automated OS-level Device Runtime Power Management
    (2014-12-01) Xu, Chao; Zhong, Lin; Cavallaro, Joseph R; Vardi, Moshe Y; Wallach, Dan S
    Hardware devices on a modern System-on-Chip (SoC), ranging from accelerators to IO controllers, usually account for the largest portion of the chip area. It is therefore vital for Operating Systems (OS) to disable and enable these devices at run time, so that idle devices can enter low-power state timely while meeting user’s performance expectation. This is called device runtime Power Management (PM), for which individual device drivers in commodity OSes are held responsible. Based on the observations of existing drivers and their evolution, we consider counting on drivers for device runtime PM harmful. We identify three pieces of information essential to device runtime PM, and show that all of them can be obtained without involving drivers, either by using a software inference approach atop existing ARM-based SoC, or more efficiently, by adding one register bit to each device. We thus argue for a structural change to the current Linux runtime PM framework, replacing PM code in each individual driver with one kernel module called central PM agent. We experimentally show that central PM agent is just as effective as hand-tuned driver PM code. We also present a software tool called PowerAdvisor, as a remedy to simplify driver PM efforts without overhauling the current Linux runtime PM framework. PowerAdvisor analyzes trace generated from historic executions and suggests PM calls to be inserted at certain driver source locations. Although a best-effort tool, PowerAdvisor not only reproduces hand-tuned PM code that already exists in stock drivers, but also correctly suggests PM code never known before . Overall, our experiences show that it is promising to ultimately free driver developers from manual PM.
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    Deep Learning Approaches for LVAD Candidacy Assessment and Cardiac ICU LVAD-related Outcome Prediction
    (2024-04-18) Mendoza Gonzales, Antonio; Cavallaro, Joseph R
    This thesis explores Deep Learning systems in advanced heart failure and Left Ventricular Assist Device (LVAD) candidacy assessment. We developed deep learning classification and semantic segmentation for 12-lead Electrocardiograms (ECG) from multiple datasets, proposed criteria for candidacy, and implemented interpretability with saliency maps and uncertainty awareness, to aid in LVAD candidate selection. Furthermore, we analyze long-term LVAD patient ECG pre-implantation progressions using an external test set. In a second aspect, we link hemodynamic response to inotropes with VAD-related outcomes by analyzing physiological time series using an ensemble approach for multi-modal waveforms in the pediatric cardiac intensive care setting of a Houston-based hospital. Our system processes minute-by-minute data with the aim of identifying the need for mechanical circulatory support. The predictions help towards early identification of high-risk patients after only two days from admission, and the estimation of feature importance confirms the predictive ability of the hemodynamic early response to inotropes.
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    Efficient Detectors for LTE Uplink Systems: From Small to Large Systems
    (2016-10-25) Wu, Michael; Cavallaro, Joseph R
    3GPP Long Term Evolution (LTE) is currently the most popular cellular wireless communication standard. Future releases of the 3GPP specifications consider large-scale (or massive) multiple-input multiple-output(MIMO), an emerging technology where the base station (BS) is equipped with hundreds of antennas. Although large-scale MIMO improves spectral efficiency, link reliability, and coverage over conventional (small-scale) MIMO systems, the dimensionality of large-scale systems increases the computational complexity of uplink data detection significantly. I present efficient data detection algorithms for the LTE uplink and analyze the performance-complexity tradeoff for small to large-scale multiple-input multiple-output (MIMO) systems. I propose an iterative detection and decoding (IDD) scheme which combines frequency domain minimum mean-square error (FD-MMSE) equalization with parallel interference cancellation (PIC) to achieve near-optimal performance and show this scheme achieves near-optimal detection performance if the number of BS antennas exceeds the number of users by roughly 2x. For (symmetric) small-scale MIMO systems, IDD significantly reduces the frame error rate (FER) while the gains with large-scale MIMO are comparably smaller, which suggests MMSE detection is sufficient for large-scale MIMO systems. Linear MMSE detection still requires a computationally complex matrix inversion. For systems with very large ratios between the number of BS and user antennas, matrix inversion is performed on a strongly diagonally dominant matrix. I investigate a variety of exact and approximate equalization schemes that solve the system of linear equations either explicitly (requiring the computation of a matrix inverse) or implicitly (by directly computing the solution vector), and we analyze the associated performance/complexity trade-offs. I show that for small base-station (BS)-to-user-antenna ratios, exact and implicit data detection using the Cholesky decomposition achieves near-optimal performance at low complexity; for large BS-to-user-antenna ratios, implicit data detection using approximate equalization methods results in the best trade-off. Finally, I show by combining the advantages of exact, approximate, implicit, and explicit matrix inversion, I develop a new frequency-adaptive equalizer (FADE), which outperforms existing linear data-detection methods in terms of performance and complexity and can scale from small-scale MIMO systems to large-scale MIMO systems.
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    Evaluation of the Hemodynamic Response of Heartbeat Synchronized Speed Modulation using a Continuous Flow Left Ventricular Assist Device
    (2024-04-19) Kiang, Simon; Cavallaro, Joseph R
    Heart disease is the leading cause of death in the United States. Left ventricular assist devices (LVAD) have been shown to be effective for treating late-stage congestive heart failure as bridge to transplant, and destination therapies. Continuous flow LVADs are currently the most clinically used however, continuous flow veers away from the naturally physiological pulsatile flow of the heart and circulatory system. This causes complications including but not limited to internal bleeding, and increased chance of thrombosis and stroke. An artificial pulsatile flow can be created with a continuous flow LVAD by increasing and decreasing its speed. Synchronizing this speed changes to the heart’s rhythm will result in flow and pressure closer to the physiological norm. This thesis covers the hemodynamic response of heartbeat synchronized speed modulation in simulation, and experimentally using a Frank-Starling controlled mock circulatory loop.
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    On the Design of Reconfigurable Edge Devices for RF Fingerprint Identification (RED-RFFI) for IoT Systems
    (2023-08-11) Keller, Thomas Aidan Flaherty; Cavallaro, Joseph R
    Radio Frequency Fingerprint Identification (RFFI) classifies wireless transmitters by the signal distortions from their unique hardware impairments. RFFI capable receivers can authenticate insecure transmissions without the sender's cooperation, making them well suited for notoriously vulnerable IoT devices. Neural networks have dominated recent RFFI implementations but are prohibitively inflexible for practical use, requiring bespoke models for different transmission schemes and complete retraining for any change in authenticated devices. This along with the high computational and energy requirements for neural network training makes RFFI unfeasible for edge deployment: a primary use case of IoT. To remedy this, we propose the Reconfigurable Edge Device for Radio Frequency Fingerprint Identification (RED-RFFI), a novel FPGA inference framework for RFFI using a programmable Deep-Learning Processing Unit (DPU) to analyze variable length signals for a mutable list of authenticated devices. This approach is uniquely capable of operating on the edge without relying on a high-performance computer for iterative FPGA redesign. Using the Xilinx Vitis AI inference development platform, we implement a state-of-the-art Transformer-based model analyzing LoRa signals as a test case.
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    Robust Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks
    (2016-04-25) Vosoughi, Aida; Cavallaro, Joseph R
    Dynamic spectrum access paradigm, enabled by cognitive radios, presents an adaptive approach for spectrum sharing by allowing secondary users to use licensed spectrum bands on an opportunistic non-interference basis. Cooperation among cognitive radios for spectrum sensing is deemed essential for environments with deep shadows. However, the existing cooperative spectrum sensing schemes for mobile ad hoc networks are high-overhead and vulnerable to spectrum sensing data falsification attacks. In this thesis, we propose a novel trust-aware consensus-inspired cooperative sensing scheme based on iterative broadcast and linear updates that is fully distributed, low-cost and resilient to malicious behavior in the cooperative network. Unlike the existing schemes, our method does not require any network discovery by the nodes for cooperation; therefore, it offers significantly lower overhead with no degradation in the sensing performance. We study Insistent Spectrum Sensing Data Falsification (ISSDF) attack aimed at iterative cooperative sensing schemes and show its destructive effect on the cooperation performance which accordingly results in reduced spectrum efficiency and increased interference with primary users. We design a novel distributed trust management scheme that is integrated into cooperation to mitigate different types of ISSDF attacks in practical scenarios where the primary user and secondary users of the spectrum and the malicious users behave dynamically. The characteristics of the proposed trust scheme is thoroughly analyzed by theory and experiments. We evaluate our proposed trust-aware distributed cooperative sensing scheme by extensive Monte Carlo simulations modeling realistic scenarios of mobile cognitive radio ad hoc networks in TV white space. We show that the proposed scheme reduces the harm of a set of collusive ISSDF attackers up to two orders of magnitude in terms of missed-detection and false alarm error rates. In addition, in a hostile environment, integration of trust management into distributed cooperative sensing considerably relaxes the sensitivity requirements on the cognitive radio devices. Furthermore, in order to evaluate the scalability, we analyze the impact of various parameters of the cognitive radio network, the cooperation scheme and the trust management scheme on the sensing performance in the presence of malicious behavior.
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    Virtual Ring Buffer for Camera Application Concurrency
    (2015-01-26) Reyes, Jose Eduardo; Zhong, Lin; Cavallaro, Joseph R; Veeraraghavan, Ashok
    Smartphones with integrated cameras have inspired a growing number of real- time, computer vision applications. Existing camera software architectures, however, do not support concurrency: only one application accesses the image stream at any time. A naive solution that makes a copy of every image for every application is inherently ine cient. Towards a computation- and power-e cient solution, this work presents a driver-level architecture, wherein a single, copy-on-write, shared-memory ring bu er delivers images to all applications via virtual interfaces. The architecture guarantees application isolation, minimizes data redundancy, and provides an illusion to applications that they are the sole consumers of the image stream. This work implements the architecture in Android 4.3.1 and characterizes its performance on a modern, multi-core smartphone. Measurements show the architecture increases CPU utilization at half the rate of the naive solution and reduces power consumption by several hundred milliwatts.
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    WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory
    (2015-04-23) Giles, Ellis Robinson; Varman, Peter J.; Cavallaro, Joseph R; Jermaine, Christoper M
    In-memory computing is gaining popularity as a means of sidestepping the performance bottlenecks of traditional block-based storage devices. However, the volatile nature of DRAM makes these systems vulnerable to system crashes, while the need to continuously refresh massive amounts of passive memory-resident data increases power consumption. Emerging storage-class memory (SCM) technologies, like Phase Change Memory and Memristors, combine fast DRAM-like cache-line access granularity with the persistence of storage devices like disks or SSDs, resulting in potential 10x - 100x performance gains, and low passive power consumption. This unification of storage and memory into a single directly-accessible persistent storage tier is a mixed blessing, as it pushes upon developers the burden of ensuring that SCM stores are ordered correctly, flushed from processor caches, and if interrupted by sudden machine stoppage, not left in inconsistent states. The complexity of ensuring properly ordered and all-or-nothing updates is addressed in this thesis in both a software-hardware architecture and a software-only based solution. This thesis extends and evaluates a software-hardware architecture called WrAP, or Write-Aside Persistence, for atomic stores to SCM. This thesis also presents SoftWrAP, a library for Software based Write-Aside Persistence, which provides lightweight atomicity and durability for SCM storage transactions. Both methods are shown to provide atomicity and durability while simultaneously ensuring that fast paths through the cache, DRAM, and persistent memory layers are not slowed down by burdensome buffering or double-copying requirements. Software-hardware architecture evaluation of trace-driven simulation of transactional data structures indicates the potential for significant performance gains using the WrAP approach. The SoftWrAP library is evaluated with both handcrafted SCM- based micro-benchmarks as well as existing applications, specifically the STX B+Tree library and SQLite database, backed by emulated SCM. Our results show the ease of using the API to create atomic persistent regions and the significant benefits of SoftWrAP over existing methods such as undo logging and shadow copying. SoftWrAP can match non-atomic durable writes to SCM, thereby gaining atomic consistency almost for free.