Configurable and Scalable Turbo Decoder for 4G Wireless Receivers

dc.citation.firstpage622
dc.citation.lastpage643
dc.citation.volumeNumber2010en_US
dc.contributor.authorSun, Yang
dc.contributor.authorCavallaro, Joseph R.
dc.contributor.authorZhu, Yuming
dc.contributor.authorManish, Goel
dc.contributor.orgCenter for Multimedia Communicationen_US
dc.date.accessioned2012-06-06T15:14:17Z
dc.date.available2012-06-06T15:14:17Z
dc.date.issued2010-01-01eng
dc.description.abstractThe increasing requirements of high data rates and quality of service (QoS) in fourth-generation (4G) wireless communication require the implementation of practical capacity approaching codes. In this chapter, the application of Turbo coding schemes that have recently been adopted in the IEEE 802.16e WiMax standard and 3GPP Long Term Evolution (LTE) standard are reviewed. In order to process several 4G wireless standards with a common hardware module, a reconfigurable and scalable Turbo decoder architecture is presented. A parallel Turbo decoding scheme with scalable parallelism tailored to the target throughput is applied to support high data rates in 4G applications. High-level decoding parallelism is achieved by employing contention-free interleavers. A multi-banked memory structure and routing network among memories and MAP decoders are designed to operate at full speed with parallel interleavers. A new on-line address generation technique is introduced to support multiple Turbo interleaving patterns, which avoids the interleaver address memory that is typically necessary in the traditional designs. Design trade-offs in terms of area and power efficiency are analyzed for different parallelism and clock frequency goals.en_US
dc.identifier.citationY. Sun, J. R. Cavallaro, Y. Zhu and G. Manish, "Configurable and Scalable Turbo Decoder for 4G Wireless Receivers," vol. 2010, 2010.
dc.identifier.issn10.4018/978-1-61520-674-2
dc.identifier.otherhttp://scholar.google.com/scholar?cluster=3278205556887870384&hl=en&as_sdt=0,44
dc.identifier.urihttps://hdl.handle.net/1911/64223
dc.language.isoengen
dc.publisherIGI-Global Pressen_US
dc.subjectError correction codesen_US
dc.subjectTurbo codesen_US
dc.subjectMAP algorithmen_US
dc.subjectBCJR algorithmen_US
dc.subjectTurbo decoderen_US
dc.subjectInterleaveren_US
dc.subjectWireless PHYen_US
dc.subject4G receiveren_US
dc.subjectVLSI architectureen_US
dc.titleConfigurable and Scalable Turbo Decoder for 4G Wireless Receiversen_US
dc.typeBook chapteren_US
dc.type.dcmiTexten
dc.type.dcmiTexten_US
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