A General Hardware/Software Co-design Methodology for Embedded Signal Processing and Multimedia Workloads

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dc.citation.conferenceDate2006en_US
dc.citation.conferenceName40th Asilomar Conference on Signals, Systems and Computersen_US
dc.citation.firstpage1486en_US
dc.citation.lastpage1490en_US
dc.citation.locationPacific Grove, CAen_US
dc.contributor.authorBrogioli, Michaelen_US
dc.contributor.authorRadosavljevic, Predragen_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communicationen_US
dc.date.accessioned2012-06-12T21:29:21Zen_US
dc.date.available2012-06-12T21:29:21Zen_US
dc.date.issued2006-11-01en_US
dc.description.abstractThis paper presents a hardware/software co-design methodology for partitioning real-time embedded multimedia applications between software programmable DSPs and hardware based FPGA coprocessors. By following a strict set of guidelines, the input application is partitioned between software executing on a programmable DSP and hardware based FPGA implementation to alleviate computational bottlenecks in modern VLIW style DSP architectures used in embedded systems. This methodology is applied to channel estimation firmware in 3.5G wireless receivers, as well as software based H.263 video decoders. As much as an 11x improvement in runtime performance can be achieved by partitioning performance critical software kernels in these workloads into a hardware based FPGA implementation executing in tandem with the existing host DSP.en_US
dc.description.sponsorshipNokia Inc.en_US
dc.description.sponsorshipTexas Instrumentsen_US
dc.description.sponsorshipNational Science Foundationen_US
dc.identifier.citationM. Brogioli, P. Radosavljevic and J. R. Cavallaro, "A General Hardware/Software Co-design Methodology for Embedded Signal Processing and Multimedia Workloads," 2006.en_US
dc.identifier.doihttp://dx.doi.org/10.1109/ACSSC.2006.355005en_US
dc.identifier.otherhttp://scholar.google.com/scholar?cluster=9991041847807109623&hl=en&as_sdt=0,44en_US
dc.identifier.urihttps://hdl.handle.net/1911/64254en_US
dc.language.isoengen_US
dc.publisherIEEEen_US
dc.subjectFPGAen_US
dc.subjectDSPen_US
dc.subjectEmbedded systemsen_US
dc.subjectWirelessen_US
dc.titleA General Hardware/Software Co-design Methodology for Embedded Signal Processing and Multimedia Workloadsen_US
dc.typeConference paperen_US
dc.type.dcmiTexten_US
dc.type.dcmiTexten_US
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