Simulation of shared memory parallel systems
| dc.contributor.advisor | Bennett, John K. | |
| dc.creator | Mukherjee, Rajat | |
| dc.date.accessioned | 2009-06-04T00:09:04Z | |
| dc.date.available | 2009-06-04T00:09:04Z | |
| dc.date.issued | 1990 | |
| dc.description.abstract | This thesis describes a method to simulate parallel programs written for shared memory multiprocessors. We have extended execution-driven simulation to facilitate the simulation of shared memory. We have developed a shared memory profiler, which, at compile-time, inserts simulation support code into the assembly code of the program to be able to extract the data address references at run-time. From the data address, we determine the nature of the reference, simulate the access and account for it. Programs to be simulated are written using Presto, an object-oriented parallel programming environment for shared memory multiprocessors based on C++. To validate the accuracy of our simulation methods, we have developed and evaluated an architecture model for the BBN Butterfly shared memory multiprocessor. The results of these tests are presented and discussed. We also describe extensions that would allow the simulation of shared memory systems with caches using execution-driven simulation techniques. | |
| dc.format.extent | 108 p. | en_US |
| dc.format.mimetype | application/pdf | |
| dc.identifier.callno | Thesis E.E. 1990 Mukherjee | |
| dc.identifier.citation | Mukherjee, Rajat. "Simulation of shared memory parallel systems." (1990) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/13455">https://hdl.handle.net/1911/13455</a>. | |
| dc.identifier.uri | https://hdl.handle.net/1911/13455 | |
| dc.language.iso | eng | |
| dc.rights | Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder. | |
| dc.subject | Computer science | |
| dc.subject | Electronics | |
| dc.subject | Electrical engineering | |
| dc.title | Simulation of shared memory parallel systems | |
| dc.type | Thesis | |
| dc.type.material | Text | |
| thesis.degree.department | Electrical Engineering | |
| thesis.degree.discipline | Engineering | |
| thesis.degree.grantor | Rice University | |
| thesis.degree.level | Masters | |
| thesis.degree.name | Master of Science |
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