Coding for Phase Change Memory Performance Optimization

dc.contributor.advisorKoushanfar, Farinazen_US
dc.contributor.committeeMemberBaraniuk, Richard G.en_US
dc.contributor.committeeMemberAazhang, Behnaamen_US
dc.creatorMirhoseini, Azaliaen_US
dc.date.accessioned2012-09-06T04:31:06Zen_US
dc.date.accessioned2012-09-06T04:31:07Zen_US
dc.date.available2012-09-06T04:31:06Zen_US
dc.date.available2012-09-06T04:31:07Zen_US
dc.date.created2012-05en_US
dc.date.issued2012-09-05en_US
dc.date.submittedMay 2012en_US
dc.date.updated2012-09-06T04:31:07Zen_US
dc.description.abstractOver the past several decades, memory technologies have exploited continual scaling of CMOS to drastically improve performance and cost. Unfortunately, charge-based memories become unreliable beyond 20 nm feature sizes. A promising alternative is Phase-Change-Memory (PCM) which leverages scalable resistive thermal mechanisms. To realize PCM's potential, a number of challenges, including the limited wear-endurance and costly writes, need to be addressed. This thesis introduces novel methodologies for encoding data on PCM which exploit asymmetries in read/write performance to minimize memory's wear/energy consumption. First, we map the problem to a distance-based graph clustering problem and prove it is NP-hard. Next, we propose two different approaches: an optimal solution based on Integer-Linear-Programming, and an approximately-optimal solution based on Dynamic-Programming. Our methods target both single-level and multi-level cell PCM and provide further optimizations for stochastically-distributed data. We devise a low overhead hardware architecture for the encoder. Evaluations demonstrate significant performance gains of our framework.en_US
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationMirhoseini, Azalia. "Coding for Phase Change Memory Performance Optimization." (2012) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/64682">https://hdl.handle.net/1911/64682</a>.en_US
dc.identifier.slug123456789/ETD-2012-05-151en_US
dc.identifier.urihttps://hdl.handle.net/1911/64682en_US
dc.language.isoengen_US
dc.rightsCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.en_US
dc.subjectPhase change memoryen_US
dc.subjectCodingen_US
dc.subjectEnergy optimizationen_US
dc.titleCoding for Phase Change Memory Performance Optimizationen_US
dc.typeThesisen_US
dc.type.materialTexten_US
thesis.degree.departmentElectrical and Computer Engineeringen_US
thesis.degree.disciplineEngineeringen_US
thesis.degree.grantorRice Universityen_US
thesis.degree.levelMastersen_US
thesis.degree.nameMaster of Scienceen_US
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