Investigation into the Fabrication and Challenges of GaN/BN Vertical FinFETs

Date
2024-06-11
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Abstract

This work studies the fabrication and challenges of GaN vertical power fin-structure field effect transistors (FinFETs) using BN as dielectric for high temperature applications. GaN etching technique and planarization methods to achieve the fabrication of vertical FinFETs have been systematically studied. A device using Al2O3 as gate dielectric material exhibits an on/off ratio of ~ 106 and a specific on-resistance of 4.2mΩcm2 confirming the successful development of fabrication process. BN thin films are directly grown on the GaN fins by chemical vapor deposition (CVD) and pulsed laser deposition (PLD). The presence of BN layer on flat GaN surface is confirmed by X-ray photoelectron spectroscopy (XPS). BN layer on sidewall GaN exhibits significantly reduced current blocking capabilities as compared to that in planar MIS structure. GaN/BN vertical FinFETs is demonstrated for the first time while the device performance still needs to be improved. The high-resolution transmission electron microscopy (HRTEM) reveals the local absence of BN after device fabrication, which can be ascribed to the adhesion issue or difficulty of nucleation on GaN non-polar sidewalls. A further investigation into the device’s high temperature performance is looking for study. This work serves as an important reference for future studies on BN-based gate dielectrics for GaN vertical transistors.

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Master of Science
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Thesis
Keywords
GaN, vertical FinFETs, BN, chemical vapor deposition, pulsed laser deposition
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