Low Power VLSI Architecture for Adaptive MAI Suppression in CDMA Using Multi-stage Convergence Masking Vector
| dc.citation.bibtexName | inproceedings | en_US |
| dc.citation.conferenceName | IEEE Vehicular Technology Conference (VTC) | en_US |
| dc.citation.location | Dallas, TX | en_US |
| dc.contributor.author | Guo, Yuanbin | en_US |
| dc.contributor.author | McCain, Dennis | en_US |
| dc.contributor.author | Cavallaro, Joseph R. | en_US |
| dc.contributor.org | Center for Multimedia Communications (http://cmc.rice.edu/) | en_US |
| dc.date.accessioned | 2007-10-31T00:46:27Z | |
| dc.date.available | 2007-10-31T00:46:27Z | |
| dc.date.issued | 2005-09-01 | |
| dc.date.modified | 2005-06-25 | en_US |
| dc.date.note | 2005-06-24 | en_US |
| dc.date.submitted | 2005-09-01 | en_US |
| dc.description | Conference Paper | en_US |
| dc.description.abstract | In this paper, we propose a novel low power and low complexity multi-stage Parallel-Residue-Compensation (PRC) architecture for enhanced MAI suppression in the CDMA systems. The accuracy of the interference cancellation is improved with a set of weights computed from an adaptive Normalized Least-Mean-Square (NLMS) algorithm. The physical meaning of the complete versus weighted interference cancellation is applied to clip the weights above a certain threshold. Multistage Convergence-Masking-Vector (CMV) is then proposed to combine with the clock gating as a dynamic power management scheme in the VLSI receiver architecture. This reduces the dynamic power consumption in the VLSI architecture by up to 90% with a negligible performance loss. | en_US |
| dc.identifier.citation | Y. Guo, D. McCain and J. R. Cavallaro, "Low Power VLSI Architecture for Adaptive MAI Suppression in CDMA Using Multi-stage Convergence Masking Vector," 2005. | |
| dc.identifier.doi | http://dx.doi.org/10.1109/VETECF.2005.1558407 | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/19941 | |
| dc.language.iso | eng | |
| dc.subject | SoC architecture | * |
| dc.subject | low power | * |
| dc.subject | adaptive | * |
| dc.subject | MAI | * |
| dc.subject.keyword | SoC architecture | en_US |
| dc.subject.keyword | low power | en_US |
| dc.subject.keyword | adaptive | en_US |
| dc.subject.keyword | MAI | en_US |
| dc.title | Low Power VLSI Architecture for Adaptive MAI Suppression in CDMA Using Multi-stage Convergence Masking Vector | en_US |
| dc.type | Conference paper | |
| dc.type.dcmi | Text |
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