Dynamic memory interconnections for rapid access
| dc.contributor.advisor | Sinclair, James B. | en_US |
| dc.contributor.committeeMember | Hirschberg, Daniel S. | en_US |
| dc.contributor.committeeMember | Jump, J. Robert | en_US |
| dc.creator | Iyer, Balakrishna R. | en_US |
| dc.date.accessioned | 2018-12-18T21:22:24Z | en_US |
| dc.date.available | 2018-12-18T21:22:24Z | en_US |
| dc.date.issued | 1981 | en_US |
| dc.description.abstract | A dynamic memory is a storage facility for fixed-size data items. The memory is comprised of cells, each cell capable of storing one datum. Data paths between cells are provided by a memory interconnection network. Each cell is directly connected to only a small number of cells. At every clock pulse, data items migrate from cell to cell via the data paths. The memory cells may be divided into several groups. A control mechanism provides each group of memory cells with a control signal. This control signal determines the data paths to be taken by data items contained in all cells within the group. Many dynamic memory organizations have been proposed. These exhibit trade-offs between the time to access a datum randomly and the time to access serially a block of logically contiguous data. The access times for these organizations are derived where necessary and compared. A new organization called the deck memory organization is proposed. Access times for the deck are determined and compared with access times derived for other organizations. | en_US |
| dc.format.digitalOrigin | reformatted digital | en_US |
| dc.format.extent | 119 pp | en_US |
| dc.identifier.callno | THESIS E.E. 1981 IYER | en_US |
| dc.identifier.citation | Iyer, Balakrishna R.. "Dynamic memory interconnections for rapid access." (1981) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/104399">https://hdl.handle.net/1911/104399</a>. | en_US |
| dc.identifier.digital | RICE2034 | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/104399 | en_US |
| dc.language.iso | eng | en_US |
| dc.rights | Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder. | en_US |
| dc.title | Dynamic memory interconnections for rapid access | en_US |
| dc.type | Thesis | en_US |
| dc.type.material | Text | en_US |
| thesis.degree.department | Electrical Engineering | en_US |
| thesis.degree.discipline | Engineering | en_US |
| thesis.degree.grantor | Rice University | en_US |
| thesis.degree.level | Masters | en_US |
| thesis.degree.name | Master of Science | en_US |
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