Structured Iterative and Circulant MIMO Chip Equalizer Architectures with FFT-acceleration for CDMA Systems

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dc.citation.bibtexNamearticleen_US
dc.citation.journalTitleIEEE Transaction on Vehicular Technologyen_US
dc.contributor.authorGuo, Yuanbinen_US
dc.contributor.authorMcCain, Dennisen_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:46:06Zen_US
dc.date.available2007-10-31T00:46:06Zen_US
dc.date.issued2005-07-01en_US
dc.date.modified2006-02-06en_US
dc.date.submitted2006-02-06en_US
dc.descriptionJournal Paperen_US
dc.description.abstractIn this paper, we propose a class of novel structured linear MMSE chip equalizer architectures for the MIMO CDMA systems using FFT-accelerations. First, a Conjugate Gradient (CG) algorithm is applied to avoid the Direct Matrix Inverse (DMI), which has O((NF)^3) complexity. By utilizing a revered form block-Toeplitz structure, the matrix multiplication in the CG iteration is accelerated by an equivalent frequencydomain FFT-based â overlap-saveâ architecture. The iteration rapidly refines a crude initial approximation to the actual final equalizer taps and significantly reduces complexity from O((NF)^2) to O(NF log2(F)). Secondly, we propose a circulant architecture which also utilizes FFT-based acceleration by approximating the DMI with a block-circulant structure. An extensive comparative analysis in performance, numerical stability and complexity demonstrates promising performance/complexity tradeoff, especially for very long channels. Both algorithms not only reduce the complexity dramatically, but also provide unified parallel and pipelined structures, which is essential for practical real-time VLSI implementation of MIMO systems.en_US
dc.identifier.citationY. Guo, D. McCain and J. R. Cavallaro, "Structured Iterative and Circulant MIMO Chip Equalizer Architectures with FFT-acceleration for CDMA Systems," <i>IEEE Transaction on Vehicular Technology,</i> 2005.en_US
dc.identifier.urihttps://hdl.handle.net/1911/19933en_US
dc.language.isoengen_US
dc.subjectCDMAen_US
dc.subjectMIMOen_US
dc.subjectLMMSE equalizeren_US
dc.subjectreal-time implementationen_US
dc.subjectiterativeen_US
dc.subjectConjugate Gradienten_US
dc.subjectcirculant.en_US
dc.subject.keywordCDMAen_US
dc.subject.keywordMIMOen_US
dc.subject.keywordLMMSE equalizeren_US
dc.subject.keywordreal-time implementationen_US
dc.subject.keyworditerativeen_US
dc.subject.keywordConjugate Gradienten_US
dc.subject.keywordcirculant.en_US
dc.titleStructured Iterative and Circulant MIMO Chip Equalizer Architectures with FFT-acceleration for CDMA Systemsen_US
dc.typeJournal articleen_US
dc.type.dcmiTexten_US
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