Rapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodology

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dc.citation.bibtexNamearticleen_US
dc.citation.journalTitleEURASIP Journal on Embedded Systemsen_US
dc.contributor.authorGuo, Yuanbinen_US
dc.contributor.authorMcCain, Dennisen_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:45:59Z
dc.date.available2007-10-31T00:45:59Z
dc.date.issued2005-12-01
dc.date.modified2006-02-06en_US
dc.date.submitted2006-02-06en_US
dc.descriptionJournal Paperen_US
dc.description.abstractIn this paper, we present a Catapult C/C++ based methodology that integrates key technologies for high-level VLSI modelling of 3G/4G wireless systems to enable extensive time/area tradeoff study. A Catapult C/C++ based architecture scheduler transfers the major workload to the algorithmic C/C++ fixedpoint design. Prototyping experiences are presented to explore the VLSI design space extensively for various types of computational intensive algorithms in the HSDPA, MIMO-CDMA and MIMOOFDM systems, such as synchronization, MIMO equalizer and the QRD-M detector. Extensive time/area tradeoff study is enabled with different architecture and resource constraints in a short design cycle. The industrial design experience demonstrates significant improvement in architecture efficiency and productivity, which enables truly rapid prototyping for the 3G and beyond wireless systems.en_US
dc.identifier.citationY. Guo, D. McCain and J. R. Cavallaro, "Rapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodology," <i>EURASIP Journal on Embedded Systems,</i> 2005.
dc.identifier.urihttps://hdl.handle.net/1911/19930
dc.language.isoeng
dc.subjectSoC*
dc.subject3G/4G*
dc.subjectMIMO*
dc.subjectHLS*
dc.subjectprototyping.*
dc.subject.keywordSoCen_US
dc.subject.keyword3G/4Gen_US
dc.subject.keywordMIMOen_US
dc.subject.keywordHLSen_US
dc.subject.keywordprototyping.en_US
dc.titleRapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodologyen_US
dc.typeJournal article
dc.type.dcmiText
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