WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory

dc.contributor.advisorVarman, Peter J.
dc.contributor.committeeMemberCavallaro, Joseph R
dc.contributor.committeeMemberJermaine, Christoper M
dc.creatorGiles, Ellis Robinson
dc.date.accessioned2016-01-14T21:59:35Z
dc.date.available2016-01-14T21:59:35Z
dc.date.created2015-05
dc.date.issued2015-04-23
dc.date.submittedMay 2015
dc.date.updated2016-01-14T21:59:36Z
dc.description.abstractIn-memory computing is gaining popularity as a means of sidestepping the performance bottlenecks of traditional block-based storage devices. However, the volatile nature of DRAM makes these systems vulnerable to system crashes, while the need to continuously refresh massive amounts of passive memory-resident data increases power consumption. Emerging storage-class memory (SCM) technologies, like Phase Change Memory and Memristors, combine fast DRAM-like cache-line access granularity with the persistence of storage devices like disks or SSDs, resulting in potential 10x - 100x performance gains, and low passive power consumption. This unification of storage and memory into a single directly-accessible persistent storage tier is a mixed blessing, as it pushes upon developers the burden of ensuring that SCM stores are ordered correctly, flushed from processor caches, and if interrupted by sudden machine stoppage, not left in inconsistent states. The complexity of ensuring properly ordered and all-or-nothing updates is addressed in this thesis in both a software-hardware architecture and a software-only based solution. This thesis extends and evaluates a software-hardware architecture called WrAP, or Write-Aside Persistence, for atomic stores to SCM. This thesis also presents SoftWrAP, a library for Software based Write-Aside Persistence, which provides lightweight atomicity and durability for SCM storage transactions. Both methods are shown to provide atomicity and durability while simultaneously ensuring that fast paths through the cache, DRAM, and persistent memory layers are not slowed down by burdensome buffering or double-copying requirements. Software-hardware architecture evaluation of trace-driven simulation of transactional data structures indicates the potential for significant performance gains using the WrAP approach. The SoftWrAP library is evaluated with both handcrafted SCM- based micro-benchmarks as well as existing applications, specifically the STX B+Tree library and SQLite database, backed by emulated SCM. Our results show the ease of using the API to create atomic persistent regions and the significant benefits of SoftWrAP over existing methods such as undo logging and shadow copying. SoftWrAP can match non-atomic durable writes to SCM, thereby gaining atomic consistency almost for free.
dc.format.mimetypeapplication/pdf
dc.identifier.citationGiles, Ellis Robinson. "WrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory." (2015) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/87822">https://hdl.handle.net/1911/87822</a>.
dc.identifier.urihttps://hdl.handle.net/1911/87822
dc.language.isoeng
dc.rightsCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.
dc.subjectSCM
dc.subjectAtomicity
dc.subjectPersistence
dc.subjectStorage Class Memory
dc.subjectPhase Change Memory
dc.subjectPCM
dc.titleWrAP: Hardware and Software Support for Atomic Persistence in Storage Class Memory
dc.typeThesis
dc.type.materialText
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineEngineering
thesis.degree.grantorRice University
thesis.degree.levelMasters
thesis.degree.nameMaster of Science
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