Phsyically Secure Cryptographic Hardware

dc.contributor.advisorYang, Kaiyuanen_US
dc.creatorHe, Yanen_US
dc.date.accessioned2022-09-29T15:26:47Zen_US
dc.date.available2023-05-01T05:01:11Zen_US
dc.date.created2022-05en_US
dc.date.issued2022-01-27en_US
dc.date.submittedMay 2022en_US
dc.date.updated2022-09-29T15:26:47Zen_US
dc.description.abstractWith the recent booming of Internet of Things (IoT) technology, people now have physical access to various mobile and embedded devices. A malicious party can bypass software security and gain valuable information through physical attacks. Therefore, the physical security of IoT hardware is becoming increasingly important. Side-channel attack (SCA) is one of the major security concerns. Attackers can gain information inside the chip through physical side channels, like power consumption, electro-magnetic (EM) radiation, timing, etc. Existing protections induce large performance and energy overhead, and usually require design-specific modifications. We propose and demonstrate prototype chips for a SCA-resistant, design agnostic, high-performance digital low drop-out regulator (DLDO). We show that the proposed design can not only achieve state-of-the-art regulation performance, it also improves >20000x Power-SCA resistance (MTD) of an AES engine with little design overheads. Secure key storage is another important issue. Traditionally, a permanent key is externally written in non-volatile memory (NVM). This approach is dubious both in its vulnerability to hostile attackers and its area and power utilization. Physically Unclonable Function (PUF), on the other hand, generates a unique key for each device, has a small area and power consumption, and is secure against various tampering methods. Previous PUFs have stability issues that require large design or testing costs to overcome. We propose Automatic and Self-Checking and Healing (ASCH) PUF with dual modes of operation that aims to achieve a fully stabilized PUF with reduced cost. Silicon prototype shows ASCH-PUF has a small design overhead, achieves 0% instability (BER) with no testing cost, and has >2x reduced masking ratio compared with previous approaches.en_US
dc.embargo.terms2023-05-01en_US
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationHe, Yan. "Phsyically Secure Cryptographic Hardware." (2022) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/113457">https://hdl.handle.net/1911/113457</a>.en_US
dc.identifier.urihttps://hdl.handle.net/1911/113457en_US
dc.language.isoengen_US
dc.rightsCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.en_US
dc.subjectHardware Securityen_US
dc.subjectSide-Channel Analysisen_US
dc.subjectPhysically Unclonable Functionen_US
dc.titlePhsyically Secure Cryptographic Hardwareen_US
dc.typeThesisen_US
dc.type.materialTexten_US
thesis.degree.departmentElectrical and Computer Engineeringen_US
thesis.degree.disciplineEngineeringen_US
thesis.degree.grantorRice Universityen_US
thesis.degree.levelMastersen_US
thesis.degree.nameMaster of Scienceen_US
Files
Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
HE-DOCUMENT-2022.pdf
Size:
8.33 MB
Format:
Adobe Portable Document Format
License bundle
Now showing 1 - 2 of 2
No Thumbnail Available
Name:
PROQUEST_LICENSE.txt
Size:
5.84 KB
Format:
Plain Text
Description:
No Thumbnail Available
Name:
LICENSE.txt
Size:
2.6 KB
Format:
Plain Text
Description: