The multistage detection algorithm has been widely accepted as an exective interference cancellation scheme for next generation Wideband Code Division Multiple Access (W-CDMA) base stations. In this paper, we propose a real-time implementation of this detection algorithm in the uplink system, where we have achieved both high performance in the interference cancellation and computational efficiency. When interference cancellation converges, the difference of the detection vectors between two consecutive stages is mostly zero. We recode the estimation bits, mapping from ±1 to 0 and ±2. Bypassing all the zero terms saves computations. Multiplication by ±2 can be easily implemented in hardware as arithmetic shifts. The system delay ofa three-stage detector can be reduced by half with satisfactory bit error rate. We also propose a VLSI implementation of this algorithm that has the potential of real-time performance. The detector handling up to eight users with 12-bit fixed point precision was fabricated using a 1.2 um CMOS technology.