Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers
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The convergence of cellular phones, the Internet, and laptop computers into a single small, lightweight, wireless information appliance drives a need for a high data rate, low-power digital wireless communication link to enable the creation of such a device. A simulation environment supporting rapid prototyping is developed, and used to evaluate the real-time data-rate performance of these receivers implemented on a multiprocessor DSP board. Simulations of a multiprocessor implementation of joint multiuser channel estimation and detection algorithms is projected to achieve combined perform-ance of 15.6 Kb/user/sec for 10 users. Performance gains over a single-processor implementation range from 5% for the three-user case to 69% for a 15 user case.
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B. A. Jones, S. Rajagopal and J. R. Cavallaro, "Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers," 2000.