An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors
dc.citation.bibtexName | inproceedings | en_US |
dc.citation.conferenceName | International Conference on Architectural Support for Programming Languages and Operating Systems (A | en_US |
dc.citation.firstpage | 12 | en_US |
dc.citation.lastpage | 23 | en_US |
dc.citation.location | Cambridge, MA | en_US |
dc.contributor.author | Pai, Vijay S. | en_US |
dc.contributor.author | Ranganathan, Parthasarathy | en_US |
dc.contributor.author | Adve, Sarita V. | en_US |
dc.contributor.author | Harton, Tracy | en_US |
dc.contributor.org | CITI (http://citi.rice.edu/) | en_US |
dc.date.accessioned | 2007-10-31T00:57:07Z | en_US |
dc.date.available | 2007-10-31T00:57:07Z | en_US |
dc.date.issued | 1996-10-20 | en_US |
dc.date.modified | 2002-03-20 | en_US |
dc.date.note | 2002-03-20 | en_US |
dc.date.submitted | 1996-10-20 | en_US |
dc.description | Conference Paper | en_US |
dc.description.abstract | None | en_US |
dc.identifier.citation | V. S. Pai, P. Ranganathan, S. V. Adve and T. Harton, "An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors," 1996. | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/20178 | en_US |
dc.language.iso | eng | en_US |
dc.subject | memory consistency | en_US |
dc.subject | instruction-level parallelism | en_US |
dc.subject | shared-memory multiprocessors | en_US |
dc.subject.keyword | memory consistency | en_US |
dc.subject.keyword | instruction-level parallelism | en_US |
dc.subject.keyword | shared-memory multiprocessors | en_US |
dc.title | An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors | en_US |
dc.type | Conference paper | en_US |
dc.type.dcmi | Text | en_US |
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