An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors

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dc.citation.bibtexNameinproceedingsen_US
dc.citation.conferenceNameInternational Conference on Architectural Support for Programming Languages and Operating Systems (Aen_US
dc.citation.firstpage12
dc.citation.lastpage23
dc.citation.locationCambridge, MAen_US
dc.contributor.authorPai, Vijay S.en_US
dc.contributor.authorRanganathan, Parthasarathyen_US
dc.contributor.authorAdve, Sarita V.en_US
dc.contributor.authorHarton, Tracyen_US
dc.contributor.orgCITI (http://citi.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:57:07Z
dc.date.available2007-10-31T00:57:07Z
dc.date.issued1996-10-20
dc.date.modified2002-03-20en_US
dc.date.note2002-03-20en_US
dc.date.submitted1996-10-20en_US
dc.descriptionConference Paperen_US
dc.description.abstractNoneen_US
dc.identifier.citationV. S. Pai, P. Ranganathan, S. V. Adve and T. Harton, "An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors," 1996.
dc.identifier.urihttps://hdl.handle.net/1911/20178
dc.language.isoeng
dc.subjectmemory consistency*
dc.subjectinstruction-level parallelism*
dc.subjectshared-memory multiprocessors*
dc.subject.keywordmemory consistencyen_US
dc.subject.keywordinstruction-level parallelismen_US
dc.subject.keywordshared-memory multiprocessorsen_US
dc.titleAn Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processorsen_US
dc.typeConference paper
dc.type.dcmiText
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