Recent Advances in Memory Consistency Models for Hardware Shared Memory Systems
| dc.citation.bibtexName | article | en_US |
| dc.citation.firstpage | 445 | en_US |
| dc.citation.issueNumber | 3 | en_US |
| dc.citation.journalTitle | Proceedings of the IEEE | en_US |
| dc.citation.lastpage | 455 | en_US |
| dc.citation.volumeNumber | 87 | en_US |
| dc.contributor.author | Adve, Sarita V. | en_US |
| dc.contributor.author | Pai, Vijay S. | en_US |
| dc.contributor.author | Ranganathan, Parthasarathy | en_US |
| dc.contributor.org | CITI (http://citi.rice.edu/) | en_US |
| dc.date.accessioned | 2007-10-31T00:33:23Z | en_US |
| dc.date.available | 2007-10-31T00:33:23Z | en_US |
| dc.date.issued | 1999-03-20 | en_US |
| dc.date.modified | 2002-03-20 | en_US |
| dc.date.submitted | 2002-03-20 | en_US |
| dc.description | Journal Paper | en_US |
| dc.description.abstract | None | en_US |
| dc.identifier.citation | S. V. Adve, V. S. Pai and P. Ranganathan, "Recent Advances in Memory Consistency Models for Hardware Shared Memory Systems," <i>Proceedings of the IEEE,</i> vol. 87, no. 3, 1999. | en_US |
| dc.identifier.doi | http://dx.doi.org/10.1109/5.747865 | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/19656 | en_US |
| dc.language.iso | eng | en_US |
| dc.subject | Hardware shared memory | en_US |
| dc.subject | instruction-level parallelism | en_US |
| dc.subject | memory consistency | en_US |
| dc.subject | performance | en_US |
| dc.subject | programmability | en_US |
| dc.subject.keyword | Hardware shared memory | en_US |
| dc.subject.keyword | instruction-level parallelism | en_US |
| dc.subject.keyword | memory consistency | en_US |
| dc.subject.keyword | performance | en_US |
| dc.subject.keyword | programmability | en_US |
| dc.title | Recent Advances in Memory Consistency Models for Hardware Shared Memory Systems | en_US |
| dc.type | Journal article | en_US |
| dc.type.dcmi | Text | en_US |
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