Accurate estimation of design metrics in deep submicron circuits: RLC interconnect delay and crosstalk induced power

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dc.contributor.advisorMassoud, Yehiaen_US
dc.creatorMondal, Mosinen_US
dc.date.accessioned2018-12-03T18:32:57Zen_US
dc.date.available2018-12-03T18:32:57Zen_US
dc.date.issued2006en_US
dc.description.abstractThe advent of the deep submicron (DSM) era was accompanied by a number of challenging effects that severely impact the performance of modern integrated circuits. In this thesis, we present models and methods for the correct estimation of two design metrics: RLC delay and crosstalk induced dynamic power. We develop an efficient analytical model for the loop self inductance that accurately estimates inductance at a given frequency. This model can be used for fast and accurate RLC delay calculation. The simplicity, precision and efficiency of our model can greatly facilitate any application that requires fast estimation of inductance, such as inductance aware physical synthesis. We also present an integrated methodology for analyzing crosstalk induced power dissipation in cell based digital designs. Techniques for estimating the switching and short circuit power are presented. A new cell pre-characterization technique for estimating the additional short circuit power is developed. A heuristic for computing the additional energy on a switching victim net is also presented in this work. Results demonstrate that the models and techniques developed in this work are accurate and efficient.en_US
dc.format.extent76 ppen_US
dc.identifier.callnoTHESIS E.E. 2007 MONDALen_US
dc.identifier.citationMondal, Mosin. "Accurate estimation of design metrics in deep submicron circuits: RLC interconnect delay and crosstalk induced power." (2006) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/103712">https://hdl.handle.net/1911/103712</a>.en_US
dc.identifier.digital305288265en_US
dc.identifier.urihttps://hdl.handle.net/1911/103712en_US
dc.language.isoengen_US
dc.rightsCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.en_US
dc.subjectElectrical engineeringen_US
dc.subjectApplied sciencesen_US
dc.titleAccurate estimation of design metrics in deep submicron circuits: RLC interconnect delay and crosstalk induced poweren_US
dc.typeThesisen_US
dc.type.materialTexten_US
thesis.degree.departmentElectrical Engineeringen_US
thesis.degree.disciplineEngineeringen_US
thesis.degree.grantorRice Universityen_US
thesis.degree.levelMastersen_US
thesis.degree.nameMaster of Scienceen_US
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