RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors
dc.citation.bibtexName | article | en_US |
dc.citation.journalTitle | IEEE Technical Committee on Computer Architecture Newsletter | en_US |
dc.contributor.author | Pai, Vijay S. | en_US |
dc.contributor.author | Ranganathan, Parthasarathy | en_US |
dc.contributor.author | Adve, Sarita V. | en_US |
dc.contributor.org | CITI (http://citi.rice.edu/) | en_US |
dc.date.accessioned | 2007-10-31T00:57:18Z | en_US |
dc.date.available | 2007-10-31T00:57:18Z | en_US |
dc.date.issued | 1997-10-20 | en_US |
dc.date.modified | 2002-03-20 | en_US |
dc.date.submitted | 2002-03-20 | en_US |
dc.description | Journal Paper | en_US |
dc.description.abstract | None | en_US |
dc.identifier.citation | V. S. Pai, P. Ranganathan and S. V. Adve, "RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors," <i>IEEE Technical Committee on Computer Architecture Newsletter,</i> 1997. | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/20182 | en_US |
dc.language.iso | eng | en_US |
dc.subject | performance simulation | en_US |
dc.subject | instruction-level parallelism | en_US |
dc.subject | shared-memory multiprocessors | en_US |
dc.subject.keyword | performance simulation | en_US |
dc.subject.keyword | instruction-level parallelism | en_US |
dc.subject.keyword | shared-memory multiprocessors | en_US |
dc.title | RSIM: An Execution-Driven Simulator for ILP-Based Shared-Memory Multiprocessors and Uniprocessors | en_US |
dc.type | Journal article | en_US |
dc.type.dcmi | Text | en_US |
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