Analysis of simple randomized buffer management for parallel I/O
dc.citation.firstpage | 47 | en_US |
dc.citation.issueNumber | 1 | en_US |
dc.citation.journalTitle | Information Processing Letters | en_US |
dc.citation.lastpage | 52 | en_US |
dc.citation.volumeNumber | 90 | en_US |
dc.contributor.author | Kallahalla, Mahesh | en_US |
dc.contributor.author | Varman, Peter J. | en_US |
dc.contributor.org | Electrical and Computer Engineering | en_US |
dc.contributor.org | Varman Laboratory | en_US |
dc.date.accessioned | 2015-09-15T17:01:43Z | en_US |
dc.date.available | 2015-09-15T17:01:43Z | en_US |
dc.date.issued | 2004-04 | en_US |
dc.description.abstract | Buffer management for a D-disk parallel I/O system is considered in the context of randomized placement of data on the disks. A simple prefetching and caching algorithm PHASE-LRU using bounded lookahead is described and analyzed. It is shown that PHASE-LRU performs an expected number of I/Os that is within a factor (logD/log logD) of the number performed by an optimal off-line algorithm. In contrast, any deterministic buffer | en_US |
dc.identifier.citation | M. Kallahalla and P. J. Varman, "Analysis of simple randomized buffer management for parallel I/O," <i>Information Processing Letters,</i> vol. 90, no. 1, 2004. | en_US |
dc.identifier.doi | http://dx.doi.org/10.1016/S0020-0190(04)00053-5 | en_US |
dc.identifier.uri | https://hdl.handle.net/1911/81638 | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Elsevier | en_US |
dc.subject.keyword | electrical and computer engineering | en_US |
dc.subject.keyword | I/O | en_US |
dc.subject.keyword | Information Storage | en_US |
dc.title | Analysis of simple randomized buffer management for parallel I/O | en_US |
dc.type | Journal article | en_US |
dc.type.dcmi | Text | en_US |
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