Novel dual-threshold voltage FinFETs for circuit design and optimization

dc.contributor.advisorMohanram, Kartik
dc.creatorRostami, Masoud
dc.date.accessioned2013-03-08T00:38:11Z
dc.date.available2013-03-08T00:38:11Z
dc.date.issued2011
dc.description.abstractA great research effort has been invested on finding alternatives to CMOS that have better process variation and subthreshold leakage. From possible candidates, FinFET is the most compatible with respect to CMOS and it has shown promising leakage and speed performance. This thesis introduces basic characteristics of FinFETs and the effects of FinFET physical parameters on their performance are explained quantitatively. I show how dual- V th independent-gate FinFETs can be fabricated by optimizing their physical parameters. Optimum values for these physical parameters are derived using the physics-based University of Florida SPICE model for double-gate devices, and the optimized FinFETs are simulated and validated using Sentaurus TCAD simulations. Dual-14, FinFETs with independent gates enable series and parallel merge transformations in logic gates, realizing compact low power alternative gates with competitive performance and reduced input capacitance in comparison to conventional FinFET gates. Furthermore, they also enable the design of a new class of compact logic gates with higher expressive power and flexibility than CMOS gates. Synthesis results for 16 benchmark circuits from the ISCAS and OpenSPARC suites indicate that on average at 2GHz and 75°C, the library that contains the novel gates reduces total power and the number of fins by 36% and 37% respectively, over a conventional library that does not have novel gates in the 32nm technology.
dc.format.extent49 p.en_US
dc.format.mimetypeapplication/pdf
dc.identifier.citationRostami, Masoud. "Novel dual-threshold voltage FinFETs for circuit design and optimization." (2011) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/70416">https://hdl.handle.net/1911/70416</a>.
dc.identifier.digitalRostamiMen_US
dc.identifier.urihttps://hdl.handle.net/1911/70416
dc.language.isoeng
dc.rightsCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.
dc.subjectApplied sciences
dc.subjectComputer engineering
dc.titleNovel dual-threshold voltage FinFETs for circuit design and optimization
dc.typeThesis
dc.type.materialText
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineEngineering
thesis.degree.grantorRice University
thesis.degree.levelMasters
thesis.degree.nameMaster of Science
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