W-CDMA real-time algorithm implementation and evaluation
| dc.citation.bibtexName | misc | en_US |
| dc.citation.journalTitle | ELEC 599 Project Report | en_US |
| dc.contributor.author | Jones, Bryan Allen | en_US |
| dc.contributor.org | Center for Multimedia Communications (http://cmc.rice.edu/) | en_US |
| dc.date.accessioned | 2007-10-31T00:48:28Z | en_US |
| dc.date.available | 2007-10-31T00:48:28Z | en_US |
| dc.date.issued | 2000-05-20 | en_US |
| dc.date.modified | 2002-10-30 | en_US |
| dc.date.submitted | 2002-10-30 | en_US |
| dc.description | Elec 599 Project Report | en_US |
| dc.description.abstract | This paper describes a platform to enable and explore the design and implementation of next-generation CDMA wireless base stations. A DSP and FPGA-based multiprocessor board is integrated into a Simulink-based wireless testbed environment, providing the ability to simulate the behavior and performance of new algorithms. Performance measurements are taken and analyzed, demonstrating key areas for algorithm improvement. | en_US |
| dc.identifier.citation | B. A. Jones, "W-CDMA real-time algorithm implementation and evaluation," <i>ELEC 599 Project Report,</i> 2000. | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/19988 | en_US |
| dc.language.iso | eng | en_US |
| dc.subject | W-CDMA | en_US |
| dc.subject | algorithm | en_US |
| dc.subject | DSP | en_US |
| dc.subject | FPGA | en_US |
| dc.subject.keyword | W-CDMA | en_US |
| dc.subject.keyword | algorithm | en_US |
| dc.subject.keyword | DSP | en_US |
| dc.subject.keyword | FPGA | en_US |
| dc.title | W-CDMA real-time algorithm implementation and evaluation | en_US |
| dc.type | Report | en_US |
| dc.type.dcmi | Text | en_US |
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