Task Partitioning Wireless Base-station Receiver Algorithms on Multiple DSPs and FPGAs

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dc.citation.bibtexNameinproceedingsen_US
dc.citation.conferenceNameInternational Conference on Signal Processing Applications and Technology (ICSPAT)en_US
dc.citation.locationDallas, TXen_US
dc.contributor.authorRajagopal, Sridharen_US
dc.contributor.authorJones, Bryan Allenen_US
dc.contributor.authorCavallaro, Joseph R.en_US
dc.contributor.orgCenter for Multimedia Communications (http://cmc.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:59:04Z
dc.date.available2007-10-31T00:59:04Z
dc.date.issued2000-10-20en
dc.date.modified2003-11-10en_US
dc.date.note2001-08-30en_US
dc.date.submitted2000-10-20en_US
dc.descriptionConference Paperen_US
dc.description.abstractThis paper presents a multiprocessor solution to meet real-time requirements of implementing advanced algorithms for multiuser channel estimation and detection for third and fourth generation wireless base-station receivers. We identify the key bottlenecks in the algorithms and task-partition the algorithms on multiple processors. We get speedups, ranging from 1.19X to 5.92X for a dual-DSP implementation due to both additional computational power and additional internal memory compared to a single DSP implementation using external memory. We also identify parts of the algorithm that exhibit bit-level parallelism, not utilized by DSPs. FPGAs can then be used to accelerate these parts and meet real-time requirements of 128 Kbps for next generation wireless systems.en_US
dc.description.sponsorshipTexas Advanced Technology Programen_US
dc.description.sponsorshipNokiaen_US
dc.description.sponsorshipNational Science Foundationen_US
dc.identifier.citationS. Rajagopal, B. A. Jones and J. R. Cavallaro, "Task Partitioning Wireless Base-station Receiver Algorithms on Multiple DSPs and FPGAs," 2000.
dc.identifier.urihttps://hdl.handle.net/1911/20223
dc.language.isoeng
dc.subjectmultiprocessor*
dc.subjectDSPs*
dc.subjectFPGAs*
dc.subjectreceiver algorithms*
dc.subjecttask partitioning*
dc.subject.keywordmultiprocessoren_US
dc.subject.keywordDSPsen_US
dc.subject.keywordFPGAsen_US
dc.subject.keywordreceiver algorithmsen_US
dc.subject.keywordtask partitioningen_US
dc.titleTask Partitioning Wireless Base-station Receiver Algorithms on Multiple DSPs and FPGAsen_US
dc.typeConference paper
dc.type.dcmiText
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