Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Models

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dc.citation.bibtexNameinproceedingsen_US
dc.citation.conferenceNameACM Symposium on Parallel Algorithms and Architectures (SPAA)en_US
dc.citation.firstpage199en_US
dc.citation.lastpage210en_US
dc.citation.locationNewport, RIen_US
dc.contributor.authorRanganathan, Parthasarathyen_US
dc.contributor.authorPai, Vijay S.en_US
dc.contributor.authorAdve, Sarita V.en_US
dc.contributor.orgCITI (http://citi.rice.edu/)en_US
dc.date.accessioned2007-10-31T00:59:59Zen_US
dc.date.available2007-10-31T00:59:59Zen_US
dc.date.issued1997-06-20en_US
dc.date.modified2002-03-20en_US
dc.date.note2002-03-20en_US
dc.date.submitted1997-06-20en_US
dc.descriptionConference Paperen_US
dc.description.abstractNoneen_US
dc.identifier.citationP. Ranganathan, V. S. Pai and S. V. Adve, "Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Models," 1997.en_US
dc.identifier.urihttps://hdl.handle.net/1911/20243en_US
dc.language.isoengen_US
dc.subjectmemory consistencyen_US
dc.subjectinstruction-level parallelismen_US
dc.subjectspeculative retirementen_US
dc.subjectshared-memory multiprocessorsen_US
dc.subject.keywordmemory consistencyen_US
dc.subject.keywordinstruction-level parallelismen_US
dc.subject.keywordspeculative retirementen_US
dc.subject.keywordshared-memory multiprocessorsen_US
dc.titleUsing Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Modelsen_US
dc.typeConference paperen_US
dc.type.dcmiTexten_US
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