A Compressive Phase-Locked Loop
| dc.contributor.advisor | Baraniuk, Richard G. | en_US |
| dc.creator | Schnelle, Stephen | en_US |
| dc.date.accessioned | 2013-03-08T00:38:42Z | en_US |
| dc.date.available | 2013-03-08T00:38:42Z | en_US |
| dc.date.issued | 2011 | en_US |
| dc.description.abstract | We develop a new method for tracking narrowband signals acquired through compressive sensing, called the compressive sensing phase-locked loop (CS-PLL). The CS-PLL enables one to track oscillating signals in very large bandwidths using a small number of measurements. Not only does the CS-PLL potentially operate below the Nyquist rate, it can extract phase and frequency information without the computational complexity normally associated with compressive sensing signal re-construction. The CS-PLL has a wide variety of applications, including but not limited to communications, phase tracking, robust control, sensing, and FM demodulation. In particular we emphasize the advantages of using this system in wideband surveillence systems. Our design modifies classical PLL designs to operate with CS-based sampling systems. Performance results are shown for PLLs operating on both real and complex data. In addition to explaining general performance tradeoffs, implementations using several different CS sampling systems are explored. | en_US |
| dc.format.extent | 124 p. | en_US |
| dc.format.mimetype | application/pdf | en_US |
| dc.identifier.citation | Schnelle, Stephen. "A Compressive Phase-Locked Loop." (2011) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/70434">https://hdl.handle.net/1911/70434</a>. | en_US |
| dc.identifier.digital | SchnelleS | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/70434 | en_US |
| dc.language.iso | eng | en_US |
| dc.rights | Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder. | en_US |
| dc.subject | Applied sciences | en_US |
| dc.subject | Electrical engineering | en_US |
| dc.title | A Compressive Phase-Locked Loop | en_US |
| dc.type | Thesis | en_US |
| dc.type.material | Text | en_US |
| thesis.degree.department | Electrical and Computer Engineering | en_US |
| thesis.degree.discipline | Engineering | en_US |
| thesis.degree.grantor | Rice University | en_US |
| thesis.degree.level | Masters | en_US |
| thesis.degree.name | Master of Science | en_US |
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