Electrical characterization of EEPROM test structures
| dc.contributor.advisor | Wilson, William L., Jr. | en_US |
| dc.creator | Elias, Joseph Andrew | en_US |
| dc.date.accessioned | 2009-06-04T08:38:56Z | en_US |
| dc.date.available | 2009-06-04T08:38:56Z | en_US |
| dc.date.issued | 1996 | en_US |
| dc.description.abstract | Electrically Erasable Programmable Read Only Memory (EEPROM) test structures have been studied using Fowler-Nordheim (FN) tunneling and low-frequency noise measurements, both before and after electrical stress. Non-linear FN curves have been observed, which can yield insights into the failure mechanisms of the EEPROMs. A model is proposed where the barrier width is locally widened due to charge trapping in the oxide. This model is based on the interpretation of the non-linear FN curves, which leads to a failure mechanism that may be dependent on the tunneling current density. As the EEPROM test structure is stressed, the trapped charge causes the barrier width between the cathode conduction band and the oxide conduction band to distort. This distortion widens the tunneling barrier locally, and forces current into other regions with narrower barrier widths. This reduces the effective tunneling area of the structure and leads to an increased tunneling current density, which may be responsible for device failure. Asperities in the regions of high current density may also affect the tunneling current. Curve fits to the data must take into account the area and field enhancement dependencies. The curve fits allow for variations in tunneling area, field enhancement, and current density to be used as metrics for comparison of device lifetimes. Noise measurements were done to attempt to correlate tunneling current noise with the device lifetime. The results were inconclusive, as burst noise was dominant and this noise was not a direct function of stress on the device. A model is proposed which is consistent with the data observed with the FN and noise measurements. | en_US |
| dc.format.extent | 243 p. | en_US |
| dc.format.mimetype | application/pdf | en_US |
| dc.identifier.callno | THESIS E.E. 1996 ELIAS | en_US |
| dc.identifier.citation | Elias, Joseph Andrew. "Electrical characterization of EEPROM test structures." (1996) Diss., Rice University. <a href="https://hdl.handle.net/1911/19108">https://hdl.handle.net/1911/19108</a>. | en_US |
| dc.identifier.uri | https://hdl.handle.net/1911/19108 | en_US |
| dc.language.iso | eng | en_US |
| dc.rights | Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder. | en_US |
| dc.subject | Electronics | en_US |
| dc.subject | Electrical engineering | en_US |
| dc.title | Electrical characterization of EEPROM test structures | en_US |
| dc.type | Thesis | en_US |
| dc.type.material | Text | en_US |
| thesis.degree.department | Electrical Engineering | en_US |
| thesis.degree.discipline | Engineering | en_US |
| thesis.degree.grantor | Rice University | en_US |
| thesis.degree.level | Doctoral | en_US |
| thesis.degree.name | Doctor of Philosophy | en_US |
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