Analytic Evaluation of Shared-Memory Systems with ILP Processors

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dc.citation.bibtexNameinproceedingsen_US
dc.citation.conferenceNameInternational Symposium on Computer Architecture (ISCA)en_US
dc.citation.firstpage380en_US
dc.citation.lastpage391en_US
dc.citation.locationBarcelona, Spainen_US
dc.contributor.authorSorin, Daniel J.en_US
dc.contributor.authorPai, Vijay S.en_US
dc.contributor.authorAdve, Sarita V.en_US
dc.contributor.authorVernon, Mary K.en_US
dc.contributor.authorWood, David A.en_US
dc.contributor.orgCITI (http://citi.rice.edu/)en_US
dc.date.accessioned2007-10-31T01:06:26Zen_US
dc.date.available2007-10-31T01:06:26Zen_US
dc.date.issued1998-06-20en_US
dc.date.modified2002-03-20en_US
dc.date.note2002-03-20en_US
dc.date.submitted1998-06-20en_US
dc.descriptionConference paperen_US
dc.description.abstractNoneen_US
dc.identifier.citationD. J. Sorin, V. S. Pai, S. V. Adve, M. K. Vernon and D. A. Wood, "Analytic Evaluation of Shared-Memory Systems with ILP Processors," 1998.en_US
dc.identifier.urihttps://hdl.handle.net/1911/20381en_US
dc.language.isoengen_US
dc.subjectanalytical modelingen_US
dc.subjectshared-memory multiprocessorsen_US
dc.subjectinstruction-level parallelismen_US
dc.subject.keywordanalytical modelingen_US
dc.subject.keywordshared-memory multiprocessorsen_US
dc.subject.keywordinstruction-level parallelismen_US
dc.titleAnalytic Evaluation of Shared-Memory Systems with ILP Processorsen_US
dc.typeConference paperen_US
dc.type.dcmiTexten_US
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