Radosavljevic, Predragde Baynast, AlexandreKarkooti, MarjanCavallaro, Joseph R.2007-10-312007-10-312006-09-012006-09-01P. Radosavljevic, A. de Baynast, M. Karkooti and J. R. Cavallaro, "High-Throughput Multi-rate LDPC Decoder based on Architecture-Oriented Parity Check Matrices," 2006.https://hdl.handle.net/1911/20211Conference PaperA high throughput pipelined LDPC decoder that supports multiple code rates and codeword sizes is proposed. In order to increase memory throughput, irregular block structured parity-check matrices are designed with the constraint of equally distributed odd and even nonzero block-columns in each horizontal layer for the pre-determined set of code rates. The designed decoder achieves a data throughput of more than 1 Gb/s without sacrificing the error-correcting performance of capacity-approaching irregular block codes. The architecture is prototyped on an FPGA and synthesized for an ASIC design flow.engLDPC codesblock-structured codeslayered belief propagationflexible structured decoder designConference paperLDPC codesblock-structured codeslayered belief propagationflexible structured decoder design