Sun, YangAmiri, KiarashWang, GuohuiYin, BeiCavallaro, Joseph R.Ly, Tai2012-07-262012-07-262012-07-12Y. Sun, K. Amiri, G. Wang, B. Yin, J. R. Cavallaro and T. Ly, "High-Level Design Tools for Complex DSP Applications," vol. Chapter 8, 2012.http://store.elsevier.com/product.jsp?isbn=9780123865359&_requestid=111075https://hdl.handle.net/1911/64508High-level synthesis design methodology - High level synthesis (HLS) [1], also known as behavioral synthesis and algorithmic synthesis, is a design process in which a high level, functional description of a design is automatically compiled into a RTL implementation that meets certain user specified design constraints. The HLS design description is ‘high level’ compared to RTL in two aspects: design abstraction, and specification language.engBook chapter