A Systolic VLSI Architecture for Complex SVD

Hemkumar, Nariankadu D.Cavallaro, Joseph R.2007-10-312007-10-311992-05-201992-05-20N. D. Hemkumar and J. R. Cavallaro, "A Systolic VLSI Architecture for Complex SVD," 1992.https://hdl.handle.net/1911/19945Conference PaperA systolic algorithm for the SVD of arbitrary complex matrices, based on the cyclic Jacobi method with "parallel ordering" is presented. A novel two-step, two-sided unitary transformation scheme, tailored to the use of CORDIC algorithms for high speed arithmetic, is employed to diagonalize a complex 2x2 matrix. Architecturally, the complex SVD array is modeled on the Brent-Luk-VanLoan array for real SVD. An expandable array of O(nÂ²) complex 2x2 matrix processors computes the SVD of an nxn matrix in O(n log n) time. A CORDIC architecture for the complex 2x2 processor with an area complexity twice that of a real 2x2 processor is proposed. Computation time for the complex SVD array is less than three times that for a real SVD array with a similar CORDIC based implementation.engcyclic Jacobi methodcomplex SVDVLSIBrent-Luk-VanLoanA Systolic VLSI Architecture for Complex SVDConference papercyclic Jacobi methodcomplex SVDVLSIBrent-Luk-VanLoan