Guo, YuanbinMcCain, DennisCavallaro, Joseph R.2007-10-312007-10-312005-12-012006-02-06Y. Guo, D. McCain and J. R. Cavallaro, "Rapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodology," <i>EURASIP Journal on Embedded Systems,</i> 2005.https://hdl.handle.net/1911/19930Journal PaperIn this paper, we present a Catapult C/C++ based methodology that integrates key technologies for high-level VLSI modelling of 3G/4G wireless systems to enable extensive time/area tradeoff study. A Catapult C/C++ based architecture scheduler transfers the major workload to the algorithmic C/C++ fixedpoint design. Prototyping experiences are presented to explore the VLSI design space extensively for various types of computational intensive algorithms in the HSDPA, MIMO-CDMA and MIMOOFDM systems, such as synchronization, MIMO equalizer and the QRD-M detector. Extensive time/area tradeoff study is enabled with different architecture and resource constraints in a short design cycle. The industrial design experience demonstrates significant improvement in architecture efficiency and productivity, which enables truly rapid prototyping for the 3G and beyond wireless systems.engSoC3G/4GMIMOHLSprototyping.Journal articleSoC3G/4GMIMOHLSprototyping.