Cavallaro, Joseph R.Luk, Franklin T.2007-10-312007-10-311988-06-202001-08-31J. R. Cavallaro and F. T. Luk, "CORDIC Arithmetic for an SVD Processor," <i>Journal of Parallel and Distributed Computing,</i> vol. 5, no. 3, 1988.https://hdl.handle.net/1911/19758Journal PaperArithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for computing vector rotations and inverse tangents. The CORDIC 2 x 2 SVD processor can be twice as fast as one assembled from traditional hardware units. A prototype VLSI implementation of a CORDIC SVD processor array is planned for use in real-time signal processing applications.engSingular Value Decomposition (SVD)CORDIC algorithmsVLSICORDIC Arithmetic for an SVD ProcessorJournal articleSingular Value Decomposition (SVD)CORDIC algorithmsVLSIhttp://dx.doi.org/10.1109/ARITH.1987.6158686