Guo, YuanbinZhang, JianzhongMcCain, DennisCavallaro, Joseph R.2012-06-042012-06-042006-02-01Y. Guo, J. Zhang, D. McCain and J. R. Cavallaro, "An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture," <i>EURASIP Journal on Applied Signal Processing,</i> vol. 2006, no. Article ID 57134, 2006.10.1155/ASP/2006/57134http://scholar.google.com/scholar?cluster=9475738772029113561&hl=en&as_sdt=0,44https://hdl.handle.net/1911/64215We present an efficient circulant approximation-based MIMO equalizer architecture for the CDMA downlink. This reduces the direct matrix inverse (DMI) of size (NF×NF) with O((NF)3) complexity to some FFT operations with O(NF log2(F)) complexity and the inverse of some (N×N) submatrices.We then propose parallel and pipelined VLSI architectures with Hermitian optimization and reduced-state FFT for further complexity optimization. Generic VLSI architectures are derived for the (4×4) high-order receiver from partitioned (2 × 2) submatrices. This leads to more parallel VLSI design with 3× further complexity reduction. Comparative study with both the conjugate-gradient and DMI algorithms shows very promising performance/complexity tradeoff. VLSI design space in terms of area/time efficiency is explored extensively for layered parallelism and pipelining with a Catapult C high-level-synthesis methodology.engMIMOCDMA downlinkOptimizationVLSIAn Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI ArchitectureJournal articlehttp://dx.doi.org/10.1155/ASP/2006/57134